A heuristic-based scheduling algorithm for high level synthesis of digital systems
High level synthesis involves tasks that will transform an abstract or algorithmic level specification to a register transfer level structure while at the same time satisfying a set of constraints and achieving a set of goals. The system normally outputs a datapath structure which implements the spe...
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/10356/19807 |
| _version_ | 1824457091721461760 |
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| author | Gulam Mohamed. |
| author2 | Tan, Han Ngee |
| author_facet | Tan, Han Ngee Gulam Mohamed. |
| author_sort | Gulam Mohamed. |
| collection | NTU |
| description | High level synthesis involves tasks that will transform an abstract or algorithmic level specification to a register transfer level structure while at the same time satisfying a set of constraints and achieving a set of goals. The system normally outputs a datapath structure which implements the specification together with a controller unit. The major tasks involved are : i) translation of input into graph-based representation; ii) operation scheduling; iii) allocation of resources; iv) creation of control unit based on the scheduled graph. Operation scheduling has been acknowledged to be one of the most important steps in high level logic synthesis. The quality of the final VLSI implementation is strongly dependent on the output of the operation scheduling system. |
| first_indexed | 2025-02-19T04:04:29Z |
| format | Thesis |
| id | ntu-10356/19807 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2025-02-19T04:04:29Z |
| publishDate | 2009 |
| record_format | dspace |
| spelling | ntu-10356/198072023-07-04T16:17:16Z A heuristic-based scheduling algorithm for high level synthesis of digital systems Gulam Mohamed. Tan, Han Ngee School of Electrical and Electronic Engineering DRNTU::Engineering High level synthesis involves tasks that will transform an abstract or algorithmic level specification to a register transfer level structure while at the same time satisfying a set of constraints and achieving a set of goals. The system normally outputs a datapath structure which implements the specification together with a controller unit. The major tasks involved are : i) translation of input into graph-based representation; ii) operation scheduling; iii) allocation of resources; iv) creation of control unit based on the scheduled graph. Operation scheduling has been acknowledged to be one of the most important steps in high level logic synthesis. The quality of the final VLSI implementation is strongly dependent on the output of the operation scheduling system. Master of Engineering 2009-12-14T06:38:52Z 2009-12-14T06:38:52Z 1992 1992 Thesis http://hdl.handle.net/10356/19807 en NANYANG TECHNOLOGICAL UNIVERSITY 147 p. application/pdf |
| spellingShingle | DRNTU::Engineering Gulam Mohamed. A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title | A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title_full | A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title_fullStr | A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title_full_unstemmed | A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title_short | A heuristic-based scheduling algorithm for high level synthesis of digital systems |
| title_sort | heuristic based scheduling algorithm for high level synthesis of digital systems |
| topic | DRNTU::Engineering |
| url | http://hdl.handle.net/10356/19807 |
| work_keys_str_mv | AT gulammohamed aheuristicbasedschedulingalgorithmforhighlevelsynthesisofdigitalsystems AT gulammohamed heuristicbasedschedulingalgorithmforhighlevelsynthesisofdigitalsystems |