FPGA implementation of MELP decoder
The MELP (Mixed Excitation Linear Prediction) Vocoder uses a mixture of noise and pulses in the synthesizer to simulate the residual signal obtained after LPC spectral whitening of input speech. This mixture removes the characteristic buzziness from the traditional LPC synthesized speech. In additio...
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| Other Authors: | |
| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/2500 |
| _version_ | 1826111813781028864 |
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| author | Tey, Peng Chiou. |
| author2 | Charoensak, Charayaphan |
| author_facet | Charoensak, Charayaphan Tey, Peng Chiou. |
| author_sort | Tey, Peng Chiou. |
| collection | NTU |
| description | The MELP (Mixed Excitation Linear Prediction) Vocoder uses a mixture of noise and pulses in the synthesizer to simulate the residual signal obtained after LPC spectral whitening of input speech. This mixture removes the characteristic buzziness from the traditional LPC synthesized speech. In addition, a third voicing state is introduced that removes thumps and tonal noises. |
| first_indexed | 2024-10-01T02:56:57Z |
| format | Thesis |
| id | ntu-10356/2500 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T02:56:57Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/25002023-03-04T00:30:31Z FPGA implementation of MELP decoder Tey, Peng Chiou. Charoensak, Charayaphan School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition The MELP (Mixed Excitation Linear Prediction) Vocoder uses a mixture of noise and pulses in the synthesizer to simulate the residual signal obtained after LPC spectral whitening of input speech. This mixture removes the characteristic buzziness from the traditional LPC synthesized speech. In addition, a third voicing state is introduced that removes thumps and tonal noises. Master of Philosophy 2008-09-17T09:04:12Z 2008-09-17T09:04:12Z 2002 2002 Thesis http://hdl.handle.net/10356/2500 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition Tey, Peng Chiou. FPGA implementation of MELP decoder |
| title | FPGA implementation of MELP decoder |
| title_full | FPGA implementation of MELP decoder |
| title_fullStr | FPGA implementation of MELP decoder |
| title_full_unstemmed | FPGA implementation of MELP decoder |
| title_short | FPGA implementation of MELP decoder |
| title_sort | fpga implementation of melp decoder |
| topic | DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition |
| url | http://hdl.handle.net/10356/2500 |
| work_keys_str_mv | AT teypengchiou fpgaimplementationofmelpdecoder |