Macromodelling of analogue circuits using VHDL-AMS

The purpose of this project is to implement the top down design system by using VHDL-AMS. VHDL-AMS, an analogue hardware description language and an extension to Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), is capable of modelling analogue models by using additio...

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Bibliografische gegevens
Hoofdauteur: Su, Latt Mon.
Andere auteurs: Lam, Yvonne Ying Hung
Formaat: Thesis
Gepubliceerd in: 2008
Onderwerpen:
Online toegang:http://hdl.handle.net/10356/3298
Omschrijving
Samenvatting:The purpose of this project is to implement the top down design system by using VHDL-AMS. VHDL-AMS, an analogue hardware description language and an extension to Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), is capable of modelling analogue models by using additional language features, and the heritage of digital modeling capability.