High-speed programmable divider for wireless communication

The recent boom in the wireless communication market has attracted the interest of almost all electronic and communication companies worldwide. The evolution in microelectronics has played a dominant role in this by creating digital signal processing (DSP) chips with more and more computing power an...

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Bibliographic Details
Main Author: Wu, Minjie.
Other Authors: Yeo, Kiat Seng
Format: Thesis
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3775
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author Wu, Minjie.
author2 Yeo, Kiat Seng
author_facet Yeo, Kiat Seng
Wu, Minjie.
author_sort Wu, Minjie.
collection NTU
description The recent boom in the wireless communication market has attracted the interest of almost all electronic and communication companies worldwide. The evolution in microelectronics has played a dominant role in this by creating digital signal processing (DSP) chips with more and more computing power and combining the discrete components of the Radio Frequency (RF) front on a few Integrated Circuits (ICs) or even on a single die. In order to be compatible with the digital processing technology, a standard CMOS process without tuning, trimming or post-processing steps must be used.
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institution Nanyang Technological University
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spelling ntu-10356/37752023-07-04T15:50:34Z High-speed programmable divider for wireless communication Wu, Minjie. Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems The recent boom in the wireless communication market has attracted the interest of almost all electronic and communication companies worldwide. The evolution in microelectronics has played a dominant role in this by creating digital signal processing (DSP) chips with more and more computing power and combining the discrete components of the Radio Frequency (RF) front on a few Integrated Circuits (ICs) or even on a single die. In order to be compatible with the digital processing technology, a standard CMOS process without tuning, trimming or post-processing steps must be used. Master of Science (Consumer Electronics) 2008-09-17T09:37:17Z 2008-09-17T09:37:17Z 2003 2003 Thesis http://hdl.handle.net/10356/3775 Nanyang Technological University application/pdf
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems
Wu, Minjie.
High-speed programmable divider for wireless communication
title High-speed programmable divider for wireless communication
title_full High-speed programmable divider for wireless communication
title_fullStr High-speed programmable divider for wireless communication
title_full_unstemmed High-speed programmable divider for wireless communication
title_short High-speed programmable divider for wireless communication
title_sort high speed programmable divider for wireless communication
topic DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems
url http://hdl.handle.net/10356/3775
work_keys_str_mv AT wuminjie highspeedprogrammabledividerforwirelesscommunication