Design of a high speed CMOS analog comparator

The comparators are widely used in the process of converting analog signals to discrete signals; as such they are required to perform at high speed. To avoid noise from triggering the comparator wrongly, hysteresis is included. However, in CMOS, offset voltage between input differential pair is quit...

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Bibliographic Details
Main Author: Chen, Qi.
Other Authors: Siek Liter
Format: Final Year Project (FYP)
Language:English
Published: 2010
Subjects:
Online Access:http://hdl.handle.net/10356/40183
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author Chen, Qi.
author2 Siek Liter
author_facet Siek Liter
Chen, Qi.
author_sort Chen, Qi.
collection NTU
description The comparators are widely used in the process of converting analog signals to discrete signals; as such they are required to perform at high speed. To avoid noise from triggering the comparator wrongly, hysteresis is included. However, in CMOS, offset voltage between input differential pair is quite significant, hence proper design is required to achieve high performance both in speed and accuracy which is allowing the widest input and output dynamic range at a supply voltage of 1.2V. This report is to introduce the fundamentals on the characterizations and applications of comparator. Different approaches in the design of the comparator have been studied by verifying the theoretical design with extensive simulations. Hence the combination of open-loop and regenerative comparator is proposed for high speed operations in circuit level design and simulation results are also listed in the report. Finally, the IC layout has been designed and simulated.
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spelling ntu-10356/401832023-07-07T17:26:30Z Design of a high speed CMOS analog comparator Chen, Qi. Siek Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The comparators are widely used in the process of converting analog signals to discrete signals; as such they are required to perform at high speed. To avoid noise from triggering the comparator wrongly, hysteresis is included. However, in CMOS, offset voltage between input differential pair is quite significant, hence proper design is required to achieve high performance both in speed and accuracy which is allowing the widest input and output dynamic range at a supply voltage of 1.2V. This report is to introduce the fundamentals on the characterizations and applications of comparator. Different approaches in the design of the comparator have been studied by verifying the theoretical design with extensive simulations. Hence the combination of open-loop and regenerative comparator is proposed for high speed operations in circuit level design and simulation results are also listed in the report. Finally, the IC layout has been designed and simulated. Bachelor of Engineering 2010-06-11T04:32:59Z 2010-06-11T04:32:59Z 2010 2010 Final Year Project (FYP) http://hdl.handle.net/10356/40183 en Nanyang Technological University 61 p. application/pdf
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Chen, Qi.
Design of a high speed CMOS analog comparator
title Design of a high speed CMOS analog comparator
title_full Design of a high speed CMOS analog comparator
title_fullStr Design of a high speed CMOS analog comparator
title_full_unstemmed Design of a high speed CMOS analog comparator
title_short Design of a high speed CMOS analog comparator
title_sort design of a high speed cmos analog comparator
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
url http://hdl.handle.net/10356/40183
work_keys_str_mv AT chenqi designofahighspeedcmosanalogcomparator