Design of the low-voltage CMOS sample-and-hold amplifier
A sample and hold circuit is used as a front-end sampler for the analog-to-digital converters. High-speed and low-power applications are more and more preferred. A fully differential CMOS sample and hold amplifier (SHA) is designed in this project. It is based on flip-around architecture. Double sam...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2010
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| Online Access: | http://hdl.handle.net/10356/40686 |