Modeling of PCI with SystemVerilog
Deep submicron semiconductor technology has enabled system-level IC design complexity to exceed millions of gates. This presents a major design and verification challenge that intensifies the demand for system-level design languages. A major impact in solving this problem has been the development...
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| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/4142 |