Application of carbon nanotubes (CNTS) in copper/low k interconnects design
With continuing device scaling from a 90nm to a 65nm node, wiring interconnect becomes increasingly crucial due to the effects on electrical resistance and wiring capacitance. The electrical resistance and parasitic capacitance associated with these metal interconnections has become a major factor...
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| Format: | Thesis |
| Language: | English |
| Published: |
2010
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| Online Access: | https://hdl.handle.net/10356/41444 |
| Summary: | With continuing device scaling from a 90nm to a 65nm node, wiring interconnect becomes increasingly crucial due to the effects on electrical resistance and wiring
capacitance. The electrical resistance and parasitic capacitance associated with these
metal interconnections has become a major factor that limits the circuit speed of such
high performance IC's. This limitation is one of the motivating factor for microelectronics industry's move away from aluminium/silicon dioxide interconnects to Cu and low-k dielectrics material systems. |
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