Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter
The analysis, design and implementation of datapath modules for a “multiplierless” asynchronous Finite-Impulse-Response (FIR) digital filter. We adopt both the multiplierless and asynchronous approaches as they potentially offer a power dissipation advantage.
Main Author: | Chua, Chien Chung. |
---|---|
Other Authors: | Gwee, Bah Hwee |
Format: | Thesis |
Published: |
2008
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/4173 |
Similar Items
-
Bit-level multiplierless FIR filter optimization incorporating sparse filter technique
by: Ye, Wen Bin, et al.
Published: (2014) -
Single-stage and cascade design of high order multiplierless linear phase FIR filters using genetic algorithm
by: Ye, Wen Bin, et al.
Published: (2014) -
Low complexity and low power FIR filter design
by: Ye, Wenbin
Published: (2014) -
Design methodologies for complexity reduction of FIR filters
by: Faust, Mathias
Published: (2014) -
Analysis, design and implementation of a low-distortion micropower digital class D amplifier
by: Adrian, Victor
Published: (2008)