Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems
The objective of this project is to search for a new algorithm to solve the module allocation and interconnection problems. Current algorithms and techniques were studied and a new technique was developed and implemented.
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| Other Authors: | |
| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/4307 |
| _version_ | 1826127770270302208 |
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| author | Goo, Chong Kiat. |
| author2 | Jong, Ching Chuen |
| author_facet | Jong, Ching Chuen Goo, Chong Kiat. |
| author_sort | Goo, Chong Kiat. |
| collection | NTU |
| description | The objective of this project is to search for a new algorithm to solve the module allocation and interconnection problems. Current algorithms and techniques were studied and a new technique was developed and implemented. |
| first_indexed | 2024-10-01T07:13:56Z |
| format | Thesis |
| id | ntu-10356/4307 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T07:13:56Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/43072023-07-04T15:58:36Z Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems Goo, Chong Kiat. Jong, Ching Chuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems The objective of this project is to search for a new algorithm to solve the module allocation and interconnection problems. Current algorithms and techniques were studied and a new technique was developed and implemented. Master of Science (Consumer Electronics) 2008-09-17T09:49:00Z 2008-09-17T09:49:00Z 2002 2002 Thesis http://hdl.handle.net/10356/4307 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Goo, Chong Kiat. Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title | Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title_full | Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title_fullStr | Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title_full_unstemmed | Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title_short | Development of a software program for module allocation and interconnection optimisation in high-level synthesis of VLSI systems |
| title_sort | development of a software program for module allocation and interconnection optimisation in high level synthesis of vlsi systems |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems |
| url | http://hdl.handle.net/10356/4307 |
| work_keys_str_mv | AT goochongkiat developmentofasoftwareprogramformoduleallocationandinterconnectionoptimisationinhighlevelsynthesisofvlsisystems |