Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications
We present in this thesis several algorithms and designs, and their IC implementation of low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications. The design methodologies span from circuit level, architecture level to algorithm level.
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| Other Authors: | |
| Format: | Thesis |
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2008
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| Online Access: | https://hdl.handle.net/10356/4315 |
| _version_ | 1824456374511206400 |
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| author | Gu, Jiangmin |
| author2 | Chang Chip Hong |
| author_facet | Chang Chip Hong Gu, Jiangmin |
| author_sort | Gu, Jiangmin |
| collection | NTU |
| description | We present in this thesis several algorithms and designs, and their IC implementation of low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications. The design methodologies span from circuit level, architecture level to algorithm level. |
| first_indexed | 2025-02-19T03:53:05Z |
| format | Thesis |
| id | ntu-10356/4315 |
| institution | Nanyang Technological University |
| last_indexed | 2025-02-19T03:53:05Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/43152023-07-04T16:44:15Z Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications Gu, Jiangmin Chang Chip Hong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits. We present in this thesis several algorithms and designs, and their IC implementation of low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications. The design methodologies span from circuit level, architecture level to algorithm level. MASTER OF ENGINEERING (EEE) 2008-09-17T09:49:08Z 2008-09-17T09:49:08Z 2005 2005 Thesis Gu, J. (2005). Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications. Master’s thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/4315 10.32657/10356/4315 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits. Gu, Jiangmin Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title | Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title_full | Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title_fullStr | Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title_full_unstemmed | Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title_short | Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications |
| title_sort | low voltage low power cmos arithmetic circuits for energy efficient vlsi applications |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits. |
| url | https://hdl.handle.net/10356/4315 |
| work_keys_str_mv | AT gujiangmin lowvoltagelowpowercmosarithmeticcircuitsforenergyefficientvlsiapplications |