Efficient architecture for MPEG-4 binary shape decoder
The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration.
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| Other Authors: | |
| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/4467 |
| _version_ | 1811686086622052352 |
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| author | Jagannatharaja Thinakaran, J. T. |
| author2 | Ho, Duan Juat |
| author_facet | Ho, Duan Juat Jagannatharaja Thinakaran, J. T. |
| author_sort | Jagannatharaja Thinakaran, J. T. |
| collection | NTU |
| description | The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration. |
| first_indexed | 2024-10-01T04:54:50Z |
| format | Thesis |
| id | ntu-10356/4467 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T04:54:50Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/44672023-07-04T15:15:01Z Efficient architecture for MPEG-4 binary shape decoder Jagannatharaja Thinakaran, J. T. Ho, Duan Juat School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration. Master of Engineering 2008-09-17T09:52:07Z 2008-09-17T09:52:07Z 2002 2002 Thesis http://hdl.handle.net/10356/4467 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Jagannatharaja Thinakaran, J. T. Efficient architecture for MPEG-4 binary shape decoder |
| title | Efficient architecture for MPEG-4 binary shape decoder |
| title_full | Efficient architecture for MPEG-4 binary shape decoder |
| title_fullStr | Efficient architecture for MPEG-4 binary shape decoder |
| title_full_unstemmed | Efficient architecture for MPEG-4 binary shape decoder |
| title_short | Efficient architecture for MPEG-4 binary shape decoder |
| title_sort | efficient architecture for mpeg 4 binary shape decoder |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| url | http://hdl.handle.net/10356/4467 |
| work_keys_str_mv | AT jagannatharajathinakaranjt efficientarchitectureformpeg4binaryshapedecoder |