State-of-the-art VCO design

The designs of Voltage Controlled Oscillators (VCO) are explored in this project in a standard RF 65nm CMOS technology. Four different VCOs (A, B, C and D) are designed and compared to discuss the advantages of PMOS transistors and capacitive cross-coupled feedback. With the contract of NMOS, the...

Full description

Bibliographic Details
Main Author: Gao, Yuan.
Other Authors: Boon Chirn Chye
Format: Final Year Project (FYP)
Language:English
Published: 2011
Subjects:
Online Access:http://hdl.handle.net/10356/44932
_version_ 1826109897326985216
author Gao, Yuan.
author2 Boon Chirn Chye
author_facet Boon Chirn Chye
Gao, Yuan.
author_sort Gao, Yuan.
collection NTU
description The designs of Voltage Controlled Oscillators (VCO) are explored in this project in a standard RF 65nm CMOS technology. Four different VCOs (A, B, C and D) are designed and compared to discuss the advantages of PMOS transistors and capacitive cross-coupled feedback. With the contract of NMOS, the oscillators built with PMOS transistors have an improvement about 5dB phase noise. However, due to the lager parasitic capacitance of PMOS, the VCOs, which employ PMOS as their core transistors, achieve relatively lower frequencies. In addition, the capacitive feedback in a VCO can provide a favorable condition for the maximum amplitude. This improvement of phase noise can be obvious in the case of PMOS VCOs. But the disadvantage of capacitive feedback is that the large fixed capacitors in the circuits decreasing the oscillating frequency and tuning range. For the employment of PMOS, Design A with capacitive feedback can generate 41GHz, and display -99.5dBc/Hz @1MHz and -120.07dBc/Hz @10MHz. While there is no capacitor in the feedback of Design B, the oscillator having 51GHz frequency obtains -95.85dBc/Hz @1MHz and -116dBc/Hz @10MHz. For the employment of NMOS, Design C with 48GHz has the phase noise of -89.38 @1MHz and -111.4dBc/Hz @10MHz. Design D achieving 66GHz frequency has the phase noise of -91.96dBc/Hz @1MHz and -114.5dBc/Hz @10MHz.
first_indexed 2024-10-01T02:25:35Z
format Final Year Project (FYP)
id ntu-10356/44932
institution Nanyang Technological University
language English
last_indexed 2024-10-01T02:25:35Z
publishDate 2011
record_format dspace
spelling ntu-10356/449322023-07-07T17:44:10Z State-of-the-art VCO design Gao, Yuan. Boon Chirn Chye School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering The designs of Voltage Controlled Oscillators (VCO) are explored in this project in a standard RF 65nm CMOS technology. Four different VCOs (A, B, C and D) are designed and compared to discuss the advantages of PMOS transistors and capacitive cross-coupled feedback. With the contract of NMOS, the oscillators built with PMOS transistors have an improvement about 5dB phase noise. However, due to the lager parasitic capacitance of PMOS, the VCOs, which employ PMOS as their core transistors, achieve relatively lower frequencies. In addition, the capacitive feedback in a VCO can provide a favorable condition for the maximum amplitude. This improvement of phase noise can be obvious in the case of PMOS VCOs. But the disadvantage of capacitive feedback is that the large fixed capacitors in the circuits decreasing the oscillating frequency and tuning range. For the employment of PMOS, Design A with capacitive feedback can generate 41GHz, and display -99.5dBc/Hz @1MHz and -120.07dBc/Hz @10MHz. While there is no capacitor in the feedback of Design B, the oscillator having 51GHz frequency obtains -95.85dBc/Hz @1MHz and -116dBc/Hz @10MHz. For the employment of NMOS, Design C with 48GHz has the phase noise of -89.38 @1MHz and -111.4dBc/Hz @10MHz. Design D achieving 66GHz frequency has the phase noise of -91.96dBc/Hz @1MHz and -114.5dBc/Hz @10MHz. Bachelor of Engineering 2011-06-07T03:34:14Z 2011-06-07T03:34:14Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/44932 en Nanyang Technological University 53 p. application/pdf
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Gao, Yuan.
State-of-the-art VCO design
title State-of-the-art VCO design
title_full State-of-the-art VCO design
title_fullStr State-of-the-art VCO design
title_full_unstemmed State-of-the-art VCO design
title_short State-of-the-art VCO design
title_sort state of the art vco design
topic DRNTU::Engineering::Electrical and electronic engineering
url http://hdl.handle.net/10356/44932
work_keys_str_mv AT gaoyuan stateoftheartvcodesign