Design and implementation of a digital integrated circuit for logarithmic conversion (C4)
This project report describes the design of an integrated circuit to implement a logarithmic converter based on the Combet’s 4-region (C4) logarithmic conversion algorithm from the front end design (HDL coding of the design specifications) to the back end (layout). The Combet’s 4-region (C4) logari...
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| Format: | Final Year Project (FYP) |
| Language: | English |
| Published: |
2011
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| Online Access: | http://hdl.handle.net/10356/45908 |
| _version_ | 1826116961102200832 |
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| author | Wong, Wee Kiat. |
| author2 | Jong Ching Chuen |
| author_facet | Jong Ching Chuen Wong, Wee Kiat. |
| author_sort | Wong, Wee Kiat. |
| collection | NTU |
| description | This project report describes the design of an integrated circuit to implement a logarithmic converter based on the Combet’s 4-region (C4) logarithmic conversion algorithm from the front end design (HDL coding of the design specifications) to the back end (layout).
The Combet’s 4-region (C4) logarithmic conversion algorithm involves piecewise linear approximation of the mantissa, dividing the mantissa curve into 4 regions. The computation of the approximation involves simple shifting and counting operations that can be easily implemented by hardware.
The design is to be described in Verilog HDL at RTL level in the Mentor Graphics Modelsim environment. Modelsim is also used for functional simulation, back annotated simulation and verification. Gate level logic synthesis will then be carried out using Synopsys Design Compiler. Various constraints are provided to optimize the area and timing of the design. The gate level netlist generated by the Design Compiler is to be used in the placement and routing of the design. |
| first_indexed | 2024-10-01T04:19:58Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/45908 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T04:19:58Z |
| publishDate | 2011 |
| record_format | dspace |
| spelling | ntu-10356/459082023-07-07T17:57:03Z Design and implementation of a digital integrated circuit for logarithmic conversion (C4) Wong, Wee Kiat. Jong Ching Chuen School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits This project report describes the design of an integrated circuit to implement a logarithmic converter based on the Combet’s 4-region (C4) logarithmic conversion algorithm from the front end design (HDL coding of the design specifications) to the back end (layout). The Combet’s 4-region (C4) logarithmic conversion algorithm involves piecewise linear approximation of the mantissa, dividing the mantissa curve into 4 regions. The computation of the approximation involves simple shifting and counting operations that can be easily implemented by hardware. The design is to be described in Verilog HDL at RTL level in the Mentor Graphics Modelsim environment. Modelsim is also used for functional simulation, back annotated simulation and verification. Gate level logic synthesis will then be carried out using Synopsys Design Compiler. Various constraints are provided to optimize the area and timing of the design. The gate level netlist generated by the Design Compiler is to be used in the placement and routing of the design. Bachelor of Engineering 2011-06-23T07:12:40Z 2011-06-23T07:12:40Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/45908 en Nanyang Technological University 107 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Wong, Wee Kiat. Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title | Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title_full | Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title_fullStr | Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title_full_unstemmed | Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title_short | Design and implementation of a digital integrated circuit for logarithmic conversion (C4) |
| title_sort | design and implementation of a digital integrated circuit for logarithmic conversion c4 |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits |
| url | http://hdl.handle.net/10356/45908 |
| work_keys_str_mv | AT wongweekiat designandimplementationofadigitalintegratedcircuitforlogarithmicconversionc4 |