Cu metallization and dielectric removal for failure analysis of ICs
Although a defect may be well understood electrically in the recent years, capturing the anomaly into image remains necessary to verify the defect location. As technology further develops, ICs nowadays have more than one interconnect layer. Hence, it is necessary to first remove the overlying layers...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2012
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| Online Access: | http://hdl.handle.net/10356/48443 |