Compact modeling of gate-all-around silicon nanowire MOSFETs
This thesis documents the compact model development for the silicon nanowire MOSFET. A surface-potential based scalable model is developed for silicon nanowire MOSFET. An accurate surface potential initial guess is derived for the iterative surface potential solution within a few iteration steps. An...
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| Format: | Thesis |
| Language: | English |
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2012
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| Online Access: | https://hdl.handle.net/10356/48643 |