Embedded logic compatible dynamic random access memory design
Logic-compatible 2T and 3T embedded DRAM (EDRAM) cells have recently gained their popularity in embedded applications because of their high density and good voltage margin. The most important design requirements in EDRAM cells are the cell area, data retention time and read speed. In the first part...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2012
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| Online Access: | http://hdl.handle.net/10356/49934 |