Thermal management of integrated electronics
The power densities in high-performance microelectronics has been ever-increasing and hence, there is an increased need of Novel Thermal Management techniques. The shrinking size of these devices coupled with rising power density has led to a substantial increase in the temperature of the d...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2014
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| Online Access: | http://hdl.handle.net/10356/61392 |
| _version_ | 1811696820909244416 |
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| author | Dameracharla, Prithvi Raj |
| author2 | Tan, Chuan Seng |
| author_facet | Tan, Chuan Seng Dameracharla, Prithvi Raj |
| author_sort | Dameracharla, Prithvi Raj |
| collection | NTU |
| description | The power densities in high-performance microelectronics has been ever-increasing and
hence, there is an increased need of Novel Thermal Management techniques. The shrinking
size of these devices coupled with rising power density has led to a substantial increase in the
temperature of the device, much beyond the desired operating temperature needed for a
reliable performance. A typical silicon based technology needs efficient thermal management
schemes which have high heat transfer co-efficients, which can dissipate heat fluxes above
≈100 W/cm2 without increasing the operating temperatures beyond ≈ 80°C .
The traditional state-of-art single phase cooling systems which rely solely on sensible heat
are very bulky and are not sufficient to fulfill our increasing requirements. As a result, we are
in need of phase-change based novel thermal management solutions which exploit latent heat
of vaporization of liquids which yield a higher heat transfer with little increase in
temperature.The author has worked with researchers at Singapore-MIT Alliance for Research and
Technology (SMART) on this issue. In this report, the author presents a multiphase thermal
management technique where arrays of cylindrical micropillars of silicon are used for thinfilm
evaporation. The author has investigated the effects of micropillar height, pitch, diameter
and the array length on maximum heat dissipation capability. An analytical model was
developed by the research team at SMART to predict the experimentally observed values of
evaporative heat flux. Due to limitations in the experimental setup, the author could only
qualitatively capture the parametric effects of micropillar geometry. |
| first_indexed | 2024-10-01T07:45:27Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/61392 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:45:27Z |
| publishDate | 2014 |
| record_format | dspace |
| spelling | ntu-10356/613922023-07-07T17:31:10Z Thermal management of integrated electronics Dameracharla, Prithvi Raj Tan, Chuan Seng School of Electrical and Electronic Engineering DRNTU::Engineering The power densities in high-performance microelectronics has been ever-increasing and hence, there is an increased need of Novel Thermal Management techniques. The shrinking size of these devices coupled with rising power density has led to a substantial increase in the temperature of the device, much beyond the desired operating temperature needed for a reliable performance. A typical silicon based technology needs efficient thermal management schemes which have high heat transfer co-efficients, which can dissipate heat fluxes above ≈100 W/cm2 without increasing the operating temperatures beyond ≈ 80°C . The traditional state-of-art single phase cooling systems which rely solely on sensible heat are very bulky and are not sufficient to fulfill our increasing requirements. As a result, we are in need of phase-change based novel thermal management solutions which exploit latent heat of vaporization of liquids which yield a higher heat transfer with little increase in temperature.The author has worked with researchers at Singapore-MIT Alliance for Research and Technology (SMART) on this issue. In this report, the author presents a multiphase thermal management technique where arrays of cylindrical micropillars of silicon are used for thinfilm evaporation. The author has investigated the effects of micropillar height, pitch, diameter and the array length on maximum heat dissipation capability. An analytical model was developed by the research team at SMART to predict the experimentally observed values of evaporative heat flux. Due to limitations in the experimental setup, the author could only qualitatively capture the parametric effects of micropillar geometry. Bachelor of Engineering 2014-06-10T01:31:37Z 2014-06-10T01:31:37Z 2014 2014 Final Year Project (FYP) http://hdl.handle.net/10356/61392 en Nanyang Technological University 57 p. application/pdf |
| spellingShingle | DRNTU::Engineering Dameracharla, Prithvi Raj Thermal management of integrated electronics |
| title | Thermal management of integrated electronics |
| title_full | Thermal management of integrated electronics |
| title_fullStr | Thermal management of integrated electronics |
| title_full_unstemmed | Thermal management of integrated electronics |
| title_short | Thermal management of integrated electronics |
| title_sort | thermal management of integrated electronics |
| topic | DRNTU::Engineering |
| url | http://hdl.handle.net/10356/61392 |
| work_keys_str_mv | AT dameracharlaprithviraj thermalmanagementofintegratedelectronics |