Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes
Memory arrays are an essential building block in any digital system. SRAM is a device that has infiltrate into myriads of hardware systems, acting as an important component. The designing of an SRAM is very critical to designing other digital circuits as well. Memory dominates the majority of space...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2014
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| Online Access: | http://hdl.handle.net/10356/61409 |
| _version_ | 1826119653612584960 |
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| author | Phua, Isabel Jie Wei |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Phua, Isabel Jie Wei |
| author_sort | Phua, Isabel Jie Wei |
| collection | NTU |
| description | Memory arrays are an essential building block in any digital system. SRAM is a device that has infiltrate into myriads of hardware systems, acting as an important component. The designing of an SRAM is very critical to designing other digital circuits as well. Memory dominates the majority of space in an integrated circuit. SRAM design comprises of prime considerations such as improved speed and condensed layout area.
This paper presents the basics of SRAM which includes the operations and the design of a 1 Kb SRAM in the 65 nm CMOS process. The aim of this project was to build a 1Kb SRAM cell array design and to learn how the SRAM array functions. Drawing and simulation was done using EDA (Electronic design automation) tools such as Cadence Virtuoso, using the UMC65nm technology. Final test results verify the function of the SRAM. The designed SRAM can be used in ultra-low-power SoCs. |
| first_indexed | 2024-10-01T05:03:37Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/61409 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T05:03:37Z |
| publishDate | 2014 |
| record_format | dspace |
| spelling | ntu-10356/614092023-07-07T16:56:43Z Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes Phua, Isabel Jie Wei School of Electrical and Electronic Engineering Kim Tae Hyoung DRNTU::Engineering Memory arrays are an essential building block in any digital system. SRAM is a device that has infiltrate into myriads of hardware systems, acting as an important component. The designing of an SRAM is very critical to designing other digital circuits as well. Memory dominates the majority of space in an integrated circuit. SRAM design comprises of prime considerations such as improved speed and condensed layout area. This paper presents the basics of SRAM which includes the operations and the design of a 1 Kb SRAM in the 65 nm CMOS process. The aim of this project was to build a 1Kb SRAM cell array design and to learn how the SRAM array functions. Drawing and simulation was done using EDA (Electronic design automation) tools such as Cadence Virtuoso, using the UMC65nm technology. Final test results verify the function of the SRAM. The designed SRAM can be used in ultra-low-power SoCs. Bachelor of Engineering 2014-06-10T03:02:47Z 2014-06-10T03:02:47Z 2014 2014 Final Year Project (FYP) http://hdl.handle.net/10356/61409 en Nanyang Technological University 34 p. application/pdf |
| spellingShingle | DRNTU::Engineering Phua, Isabel Jie Wei Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title | Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title_full | Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title_fullStr | Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title_full_unstemmed | Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title_short | Design and analysis of temperature-variation-tolerant ultra-low voltage circuits for wireless sensor nodes |
| title_sort | design and analysis of temperature variation tolerant ultra low voltage circuits for wireless sensor nodes |
| topic | DRNTU::Engineering |
| url | http://hdl.handle.net/10356/61409 |
| work_keys_str_mv | AT phuaisabeljiewei designandanalysisoftemperaturevariationtolerantultralowvoltagecircuitsforwirelesssensornodes |