Low power data-driven dynamic logic circuits
Dynamic Logic is used in high performance circuit designs for its high speed and less transistor needed to implement a same function compared to Static Logic. Data-Driven Dynamic Logic utilizes input data to replace clock signal as control of pre-charge and evaluation phase. By elimination...
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
| Published: |
2015
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| Online Access: | http://hdl.handle.net/10356/64960 |
| _version_ | 1811685260921929728 |
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| author | Zhang, Han |
| author2 | Lau Kim Teen |
| author_facet | Lau Kim Teen Zhang, Han |
| author_sort | Zhang, Han |
| collection | NTU |
| description | Dynamic Logic is used in high performance circuit designs for its high speed and less
transistor needed to implement a same function compared to Static Logic.
Data-Driven Dynamic Logic utilizes input data to replace clock signal as control of
pre-charge and evaluation phase. By elimination the clock, less power consumption
can be obtained without speed degradation. In this project, Data-Driven Dynamic
Logic is undertaken to design CMOS circuits concentrating on power and speed
performance. Full Adders are designed with D3L technique and Domino, NP-CMOS
circuit techniques to compare the performance trade-offs. 4-bit Ripper Carry Adder,
4-bit Kogge-Stone Adder and 16-bit Kogge-Stone adder are also implemented and
simulated using Cadence Virtuoso software. The results show that Data-Driven
Dynamic Logic circuits are able to work under low supply voltage. For simple basic
logic, D3L logic may save power at the cost of longer pre-charge time. When
Data-Driven Driven Dynamic Logic is applied to 16-bit Kogge-Stone Adder, the
advantage becomes evident that it is 13% faster and the power consumption is 15%
lower. |
| first_indexed | 2024-10-01T04:41:42Z |
| format | Thesis |
| id | ntu-10356/64960 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T04:41:42Z |
| publishDate | 2015 |
| record_format | dspace |
| spelling | ntu-10356/649602023-07-04T15:24:22Z Low power data-driven dynamic logic circuits Zhang, Han Lau Kim Teen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Dynamic Logic is used in high performance circuit designs for its high speed and less transistor needed to implement a same function compared to Static Logic. Data-Driven Dynamic Logic utilizes input data to replace clock signal as control of pre-charge and evaluation phase. By elimination the clock, less power consumption can be obtained without speed degradation. In this project, Data-Driven Dynamic Logic is undertaken to design CMOS circuits concentrating on power and speed performance. Full Adders are designed with D3L technique and Domino, NP-CMOS circuit techniques to compare the performance trade-offs. 4-bit Ripper Carry Adder, 4-bit Kogge-Stone Adder and 16-bit Kogge-Stone adder are also implemented and simulated using Cadence Virtuoso software. The results show that Data-Driven Dynamic Logic circuits are able to work under low supply voltage. For simple basic logic, D3L logic may save power at the cost of longer pre-charge time. When Data-Driven Driven Dynamic Logic is applied to 16-bit Kogge-Stone Adder, the advantage becomes evident that it is 13% faster and the power consumption is 15% lower. Master of Science (Electronics) 2015-06-10T01:13:27Z 2015-06-10T01:13:27Z 2014 2014 Thesis http://hdl.handle.net/10356/64960 en 78 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Zhang, Han Low power data-driven dynamic logic circuits |
| title | Low power data-driven dynamic logic circuits |
| title_full | Low power data-driven dynamic logic circuits |
| title_fullStr | Low power data-driven dynamic logic circuits |
| title_full_unstemmed | Low power data-driven dynamic logic circuits |
| title_short | Low power data-driven dynamic logic circuits |
| title_sort | low power data driven dynamic logic circuits |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| url | http://hdl.handle.net/10356/64960 |
| work_keys_str_mv | AT zhanghan lowpowerdatadrivendynamiclogiccircuits |