Power analysis of multi-protocol serdes
SerDes (serializer/deserializer) transceiver blocks are used in high-speed serial links. The serialization and de-serialization of data, together with the high rate at which they are performed in recent communication standards that produces transfer rates in the order of GT/s (Giga Transfers per sec...
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
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2018
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| Online Access: | http://hdl.handle.net/10356/73115 |
| _version_ | 1826114951357399040 |
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| author | Francesco, Asola |
| author2 | Lim Meng Hiot |
| author_facet | Lim Meng Hiot Francesco, Asola |
| author_sort | Francesco, Asola |
| collection | NTU |
| description | SerDes (serializer/deserializer) transceiver blocks are used in high-speed serial links. The serialization and de-serialization of data, together with the high rate at which they are performed in recent communication standards that produces transfer rates in the order of GT/s (Giga Transfers per second), make the SerDes block one of the most critical elements to consider for the overall power consumption of a system. Moreover, since SerDes power budget is directly related to the type of protocol used in the serial link, power performance becomes crucial for multi-protocol SerDes, where multiple interconnects can run different standards with diverse power consumption (e.g. PCIe, USB and SATA). The objective of this thesis is to provide a detailed power analysis of these multiprotocol SerDes, as well as to present a test case consisting of a SerDes for a PCIe high-speed serial link and give some insights on the possible improvements on power consumption. Finally, the results show how multi-protocol SerDes achieve power reduction and in particular how PCIe influences the multi-protocol SerDes behaviour in low power states. |
| first_indexed | 2024-10-01T03:47:35Z |
| format | Thesis |
| id | ntu-10356/73115 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T03:47:35Z |
| publishDate | 2018 |
| record_format | dspace |
| spelling | ntu-10356/731152023-07-04T15:05:46Z Power analysis of multi-protocol serdes Francesco, Asola Lim Meng Hiot School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering SerDes (serializer/deserializer) transceiver blocks are used in high-speed serial links. The serialization and de-serialization of data, together with the high rate at which they are performed in recent communication standards that produces transfer rates in the order of GT/s (Giga Transfers per second), make the SerDes block one of the most critical elements to consider for the overall power consumption of a system. Moreover, since SerDes power budget is directly related to the type of protocol used in the serial link, power performance becomes crucial for multi-protocol SerDes, where multiple interconnects can run different standards with diverse power consumption (e.g. PCIe, USB and SATA). The objective of this thesis is to provide a detailed power analysis of these multiprotocol SerDes, as well as to present a test case consisting of a SerDes for a PCIe high-speed serial link and give some insights on the possible improvements on power consumption. Finally, the results show how multi-protocol SerDes achieve power reduction and in particular how PCIe influences the multi-protocol SerDes behaviour in low power states. Master of Science (Integrated Circuit Design) 2018-01-03T06:20:35Z 2018-01-03T06:20:35Z 2018 Thesis http://hdl.handle.net/10356/73115 en 78 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Francesco, Asola Power analysis of multi-protocol serdes |
| title | Power analysis of multi-protocol serdes |
| title_full | Power analysis of multi-protocol serdes |
| title_fullStr | Power analysis of multi-protocol serdes |
| title_full_unstemmed | Power analysis of multi-protocol serdes |
| title_short | Power analysis of multi-protocol serdes |
| title_sort | power analysis of multi protocol serdes |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | http://hdl.handle.net/10356/73115 |
| work_keys_str_mv | AT francescoasola poweranalysisofmultiprotocolserdes |