Power management for image sensor
The pixels in CMOS Image Sensor (CIS) require clean reference voltages for the gate or drain bias of pixel MOS transistors to ensure good image quality. The generation of such pixel supply voltages, as part of the CIS Power Management design, is typically realized by a series of linear regulators. T...
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| Format: | Thesis |
| Language: | English |
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2018
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| Online Access: | http://hdl.handle.net/10356/76081 |