FPGA implementation of Kahan summation algorithm

FPGA implementation of Kahan summation algorithm

In this project, Kahan Summation Algorithm, and an improved version of it, Kahan- Babuska Algorithm have been implemented in an FPGA platform to increase the accuracy in basic floating-point computation The Kahan Summation Algorithm is a method to add floating point numbers in a way to reduce the...

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Bibliographic Details
Main Author:	Darshni, R
Other Authors:	Smitha Kavallur Pisharath Gopi
Format:	Final Year Project (FYP)
Language:	English
Published:	2018
Subjects:	DRNTU::Engineering::Computer science and engineering
Online Access:	http://hdl.handle.net/10356/76134

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