Co-optimization of algorithm and hardware for energy and area efficient binary neural network
The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the co...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2018
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| Online Access: | http://hdl.handle.net/10356/76302 |
| _version_ | 1811681284329570304 |
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| author | Ng, Samuel Ming Ern |
| author2 | Kim Bongjin |
| author_facet | Kim Bongjin Ng, Samuel Ming Ern |
| author_sort | Ng, Samuel Ming Ern |
| collection | NTU |
| description | The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the constraining of certain parameters. On the algorithm, by constraining to -1 and +1, it is estimated that power consumption can be improved by 32x.
The project is currently developed using Python using the Tensorflow and Keras Deep Learning Libraries.
At the end of the project, we hope to achieve a product that is able to run the neural networks with relative high accuracy, comparable to conventional ones trained on CPU/GPU infrastructure, on a chip with high energy reduction of 10x and above, and a size reduction. |
| first_indexed | 2024-10-01T03:38:30Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/76302 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T03:38:30Z |
| publishDate | 2018 |
| record_format | dspace |
| spelling | ntu-10356/763022023-07-07T17:13:25Z Co-optimization of algorithm and hardware for energy and area efficient binary neural network Ng, Samuel Ming Ern Kim Bongjin School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the constraining of certain parameters. On the algorithm, by constraining to -1 and +1, it is estimated that power consumption can be improved by 32x. The project is currently developed using Python using the Tensorflow and Keras Deep Learning Libraries. At the end of the project, we hope to achieve a product that is able to run the neural networks with relative high accuracy, comparable to conventional ones trained on CPU/GPU infrastructure, on a chip with high energy reduction of 10x and above, and a size reduction. Bachelor of Engineering (Electrical and Electronic Engineering) 2018-12-18T01:15:45Z 2018-12-18T01:15:45Z 2018 Final Year Project (FYP) http://hdl.handle.net/10356/76302 en Nanyang Technological University 40 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Ng, Samuel Ming Ern Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title | Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title_full | Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title_fullStr | Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title_full_unstemmed | Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title_short | Co-optimization of algorithm and hardware for energy and area efficient binary neural network |
| title_sort | co optimization of algorithm and hardware for energy and area efficient binary neural network |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | http://hdl.handle.net/10356/76302 |
| work_keys_str_mv | AT ngsamuelmingern cooptimizationofalgorithmandhardwareforenergyandareaefficientbinaryneuralnetwork |