Design of a sub-1V low-dropout (LDO) voltage regulator in FinFET technology
Trends in multi-gigahertz analog and RF circuits designed in deep-submicron technology requires ever-low power supply. This has given boost to a whole new area of low-power, high speed consumer electronics. However, increasing speed of operation needs more current and consequently increased power di...
Main Author: | Vats Ved Prakash |
---|---|
Other Authors: | Siek Liter |
Format: | Thesis |
Language: | English |
Published: |
2019
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/77058 |
Similar Items
-
Design of low dropout voltage regulator (LDO)
by: Cheng, Yilin
Published: (2016) -
Temperature characteristics of FinFET based on channel fin width and working voltage
by: Atalla, Yousif, et al.
Published: (2020) -
Novel heterogeneous integration technology of III-V layers and InGaAs FinFETs to silicon
by: Dai, Xing, et al.
Published: (2014) -
The impact of channel fin width on electrical characteristics of Si-FinFET
by: Atalla, Y., et al.
Published: (2022) -
The impact of channel fin width on electrical characteristics of
Si-FinFET
by: Atalla, Yousif, et al.
Published: (2022)