Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing

Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing

In modern VLSI technology, the occurrence of all kinds of...

Full description

Bibliographic Details
Main Authors: Zhu, Ning, Goh, Wang Ling, Zhang, Weija, Yeo, Kiat Seng, Kong, Zhi Hui
Other Authors: School of Electrical and Electronic Engineering
Format: Journal Article
Language:English
Published: 2010
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:https://hdl.handle.net/10356/79964
http://hdl.handle.net/10220/6241

Internet

https://hdl.handle.net/10356/79964
http://hdl.handle.net/10220/6241

Similar Items