A Low Overhead Quasi-Delay-Insensitive (QDI) Asynchronous Data Path Synthesis Based on Microcell-Interleaving Genetic Algorithm (MIGA)
In this paper, we propose a design approach to mitigate the hardware overhead of the data completion detection circuit in quasi-delay-insensitive (QDI) asynchronous-logic circuits. In this proposed design approach, three novelties are highlighted. Firstly, a novel microcell-interleaving approach is...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/81349 http://hdl.handle.net/10220/39226 |