Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C
This paper presents an 8-Kbit low-power SRAM for high-temperature (up to 300°C) applications. For reliable low-voltage operation, we employed a decoupled 8T SRAM cell structure. To minimize the performance variations caused by the wide operating temperate range, supply voltage was selected in the ne...
| Main Authors: | , |
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| Format: | Journal Article |
| Language: | English |
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2016
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| Online Access: | https://hdl.handle.net/10356/81733 http://hdl.handle.net/10220/39665 |
| _version_ | 1826129580889473024 |
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| author | Kim, Tony Tae-Hyoung Le Ba, Ngoc |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Kim, Tony Tae-Hyoung Le Ba, Ngoc |
| author_sort | Kim, Tony Tae-Hyoung |
| collection | NTU |
| description | This paper presents an 8-Kbit low-power SRAM for high-temperature (up to 300°C) applications. For reliable low-voltage operation, we employed a decoupled 8T SRAM cell structure. To minimize the performance variations caused by the wide operating temperate range, supply voltage was selected in the near-threshold region. A temperature-aware bitline sensing margin enhancement technique is proposed to mitigate the impact of significantly increased bitline leakage on bitline swing and sensing window. A temperature-tracking control circuit generates bias voltage for optimal pull-up current for realizing the proposed enhancement technique. Test chips were fabricated in a commercial 5 V, 1.0 μm SOI technology. Test chip measurement demonstrates successful operation down to 2 V at 300°C. The average energy of 0.94 pJ was achieved at 2 V and 300°C. |
| first_indexed | 2024-10-01T07:42:33Z |
| format | Journal Article |
| id | ntu-10356/81733 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:42:33Z |
| publishDate | 2016 |
| record_format | dspace |
| spelling | ntu-10356/817332020-03-07T13:57:26Z Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C Kim, Tony Tae-Hyoung Le Ba, Ngoc School of Electrical and Electronic Engineering Solid-State Circuits This paper presents an 8-Kbit low-power SRAM for high-temperature (up to 300°C) applications. For reliable low-voltage operation, we employed a decoupled 8T SRAM cell structure. To minimize the performance variations caused by the wide operating temperate range, supply voltage was selected in the near-threshold region. A temperature-aware bitline sensing margin enhancement technique is proposed to mitigate the impact of significantly increased bitline leakage on bitline swing and sensing window. A temperature-tracking control circuit generates bias voltage for optimal pull-up current for realizing the proposed enhancement technique. Test chips were fabricated in a commercial 5 V, 1.0 μm SOI technology. Test chip measurement demonstrates successful operation down to 2 V at 300°C. The average energy of 0.94 pJ was achieved at 2 V and 300°C. ASTAR (Agency for Sci., Tech. and Research, S’pore) Accepted version 2016-01-12T05:50:34Z 2019-12-06T14:39:24Z 2016-01-12T05:50:34Z 2019-12-06T14:39:24Z 2014 Journal Article Kim, T. T.-H., & Le Ba, N. (2014). Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C. IEEE Journal of Solid-State Circuits, 49(11), 2534-2546. https://hdl.handle.net/10356/81733 http://hdl.handle.net/10220/39665 10.1109/JSSC.2014.2338860 en IEEE Journal of Solid-State Circuits © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/JSSC.2014.2338860]. 34 p. application/pdf |
| spellingShingle | Solid-State Circuits Kim, Tony Tae-Hyoung Le Ba, Ngoc Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title | Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title_full | Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title_fullStr | Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title_full_unstemmed | Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title_short | Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C |
| title_sort | design of a temperature aware low voltage sram with self adjustable sensing margin enhancement for high temperature applications up to 300 °c |
| topic | Solid-State Circuits |
| url | https://hdl.handle.net/10356/81733 http://hdl.handle.net/10220/39665 |
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