Counteracting differential power analysis: Hiding encrypted data from circuit cells
We propose a balanced Pre-Charge Static Logic (PCSL) circuit style for asynchronous systems, and compare it against other reported circuit styles to counteract differential power analysis (DPA). Our study shows that all these circuit styles (including our balanced PCSL) dissipate different energy du...
| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2016
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| Online Access: | https://hdl.handle.net/10356/84036 http://hdl.handle.net/10220/41564 |
| _version_ | 1811692710020513792 |
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| author | Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Ho, Weng-Geng Liu, Nan Akbar, Ali H. Gwee, Bah-Hwee Chang, Joseph Sylvester |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Ho, Weng-Geng Liu, Nan Akbar, Ali H. Gwee, Bah-Hwee Chang, Joseph Sylvester |
| author_sort | Chong, Kwen-Siong |
| collection | NTU |
| description | We propose a balanced Pre-Charge Static Logic (PCSL) circuit style for asynchronous systems, and compare it against other reported circuit styles to counteract differential power analysis (DPA). Our study shows that all these circuit styles (including our balanced PCSL) dissipate different energy due to data-dependency, and hence balancing the energy of circuits embodying these circuit styles remains challenging. However, in view of low circuit overheads and asynchronous operations (with noise generation), our balanced PCSL is still competitive in terms of DPA-resistance, requiring 3.5x less power traces than its NULL convention logic counterpart. |
| first_indexed | 2024-10-01T06:40:06Z |
| format | Conference Paper |
| id | ntu-10356/84036 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T06:40:06Z |
| publishDate | 2016 |
| record_format | dspace |
| spelling | ntu-10356/840362020-03-07T13:24:44Z Counteracting differential power analysis: Hiding encrypted data from circuit cells Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Ho, Weng-Geng Liu, Nan Akbar, Ali H. Gwee, Bah-Hwee Chang, Joseph Sylvester School of Electrical and Electronic Engineering 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) solid state circuits integrated circuits We propose a balanced Pre-Charge Static Logic (PCSL) circuit style for asynchronous systems, and compare it against other reported circuit styles to counteract differential power analysis (DPA). Our study shows that all these circuit styles (including our balanced PCSL) dissipate different energy due to data-dependency, and hence balancing the energy of circuits embodying these circuit styles remains challenging. However, in view of low circuit overheads and asynchronous operations (with noise generation), our balanced PCSL is still competitive in terms of DPA-resistance, requiring 3.5x less power traces than its NULL convention logic counterpart. ASTAR (Agency for Sci., Tech. and Research, S’pore) Accepted version 2016-10-17T03:23:40Z 2019-12-06T15:36:57Z 2016-10-17T03:23:40Z 2019-12-06T15:36:57Z 2015 Conference Paper Chong, K.-S., Ne, K. Z. L., Ho, W.-G., Liu, N., Akbar, A. H., Gwee, B.-H., et al. (2015). Counteracting differential power analysis: Hiding encrypted data from circuit cells. 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 15506250-. https://hdl.handle.net/10356/84036 http://hdl.handle.net/10220/41564 10.1109/EDSSC.2015.7285109 en © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/EDSSC.2015.7285109]. 4p. application/pdf |
| spellingShingle | solid state circuits integrated circuits Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Ho, Weng-Geng Liu, Nan Akbar, Ali H. Gwee, Bah-Hwee Chang, Joseph Sylvester Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title | Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title_full | Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title_fullStr | Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title_full_unstemmed | Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title_short | Counteracting differential power analysis: Hiding encrypted data from circuit cells |
| title_sort | counteracting differential power analysis hiding encrypted data from circuit cells |
| topic | solid state circuits integrated circuits |
| url | https://hdl.handle.net/10356/84036 http://hdl.handle.net/10220/41564 |
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