A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations
A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realiz...
| Main Authors: | , , , , , , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2019
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/85219 http://hdl.handle.net/10220/48196 |
| _version_ | 1826116097110179840 |
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| author | Jung, Yun-Hwan Yoo, Taegeun Hong, Yohan Yun, Jaecheol Kim, Ju Eon Jo, Youngkwon Baek, Kwang-Hyun Yoon, Dong-Hyun Lee, Sung-min Kim, Yong Sin |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Jung, Yun-Hwan Yoo, Taegeun Hong, Yohan Yun, Jaecheol Kim, Ju Eon Jo, Youngkwon Baek, Kwang-Hyun Yoon, Dong-Hyun Lee, Sung-min Kim, Yong Sin |
| author_sort | Jung, Yun-Hwan |
| collection | NTU |
| description | A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25mm². |
| first_indexed | 2024-10-01T04:05:49Z |
| format | Journal Article |
| id | ntu-10356/85219 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T04:05:49Z |
| publishDate | 2019 |
| record_format | dspace |
| spelling | ntu-10356/852192020-03-07T13:57:25Z A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations Jung, Yun-Hwan Yoo, Taegeun Hong, Yohan Yun, Jaecheol Kim, Ju Eon Jo, Youngkwon Baek, Kwang-Hyun Yoon, Dong-Hyun Lee, Sung-min Kim, Yong Sin School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Return-to-zero Digital-to-analog Converter A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25mm². Published version 2019-05-15T01:14:00Z 2019-12-06T15:59:43Z 2019-05-15T01:14:00Z 2019-12-06T15:59:43Z 2017 Journal Article Yun, J., Jung, Y.-H., Yoo, T., Hong, Y., Kim, J. E., Yoon, D.-H., . . . Baek, K.-H. (2017). A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations. Journal of Semiconductor Technology and Science, 17(3), 378-386. doi:10.5573/JSTS.2017.17.3.378 1598-1657 https://hdl.handle.net/10356/85219 http://hdl.handle.net/10220/48196 10.5573/JSTS.2017.17.3.378 en Journal of Semiconductor Technology and Science © 2017 The Institute of Electronics and Information Engineers. All rights reserved. This paper was published in Journal of Semiconductor Technology and Science and is made available with permission of The Institute of Electronics and Information Engineers. 9 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Return-to-zero Digital-to-analog Converter Jung, Yun-Hwan Yoo, Taegeun Hong, Yohan Yun, Jaecheol Kim, Ju Eon Jo, Youngkwon Baek, Kwang-Hyun Yoon, Dong-Hyun Lee, Sung-min Kim, Yong Sin A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title | A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title_full | A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title_fullStr | A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title_full_unstemmed | A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title_short | A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations |
| title_sort | return to zero dac with tri state switching scheme for multiple nyquist operations |
| topic | DRNTU::Engineering::Electrical and electronic engineering Return-to-zero Digital-to-analog Converter |
| url | https://hdl.handle.net/10356/85219 http://hdl.handle.net/10220/48196 |
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