Ultra-low power SRAM and SRAM based PUF design
With the recent development of portable devices and wearable technology, the requirements of long battery life-time, ultra-low power consumption and low cost in system-on-a-chip (SoC) are becoming increasingly significant. However, the aggressive CMOS technology which integrates with more devices a...
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| Format: | Thesis |
| Language: | English |
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2019
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| Online Access: | https://hdl.handle.net/10356/86213 http://hdl.handle.net/10220/50457 |
| _version_ | 1824453849013813248 |
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| author | Lu, Lu |
| author2 | Kim Tae Hyoung |
| author_facet | Kim Tae Hyoung Lu, Lu |
| author_sort | Lu, Lu |
| collection | NTU |
| description | With the recent development of portable devices and wearable technology, the requirements of long battery life-time, ultra-low power consumption and low cost in system-on-a-chip (SoC) are becoming increasingly significant. However, the aggressive CMOS technology which integrates with more devices and larger capacitor cache cause high power density. As a crucial approach to meet the ultra-low-power and energy usage, a supply voltage scaling technique has been commonly employed. The power consumption is being effectively suppressed with optimized energy efficiency under near- / sub-threshold voltage region. Meanwhile, static-random-access-memory (SRAM) designs are also facing some challenges when it comes for voltage scaling. In conventional 6T SRAMs, the minimum operating voltage is limited by the conflicting requirements from the ability to write and read stably. In addition, operating SRAMs in the near- or sub-threshold voltage regions have significantly degraded Ion-to-Ioff ratios and exponentially increased device variations, which deteriorates various SRAM design parameters, like read margin, static noise margin and write ability, etc. |
| first_indexed | 2025-02-19T03:12:57Z |
| format | Thesis |
| id | ntu-10356/86213 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2025-02-19T03:12:57Z |
| publishDate | 2019 |
| record_format | dspace |
| spelling | ntu-10356/862132023-07-04T17:20:08Z Ultra-low power SRAM and SRAM based PUF design Lu, Lu Kim Tae Hyoung School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering With the recent development of portable devices and wearable technology, the requirements of long battery life-time, ultra-low power consumption and low cost in system-on-a-chip (SoC) are becoming increasingly significant. However, the aggressive CMOS technology which integrates with more devices and larger capacitor cache cause high power density. As a crucial approach to meet the ultra-low-power and energy usage, a supply voltage scaling technique has been commonly employed. The power consumption is being effectively suppressed with optimized energy efficiency under near- / sub-threshold voltage region. Meanwhile, static-random-access-memory (SRAM) designs are also facing some challenges when it comes for voltage scaling. In conventional 6T SRAMs, the minimum operating voltage is limited by the conflicting requirements from the ability to write and read stably. In addition, operating SRAMs in the near- or sub-threshold voltage regions have significantly degraded Ion-to-Ioff ratios and exponentially increased device variations, which deteriorates various SRAM design parameters, like read margin, static noise margin and write ability, etc. Doctor of Philosophy 2019-11-22T11:45:41Z 2019-12-06T16:18:11Z 2019-11-22T11:45:41Z 2019-12-06T16:18:11Z 2019 Thesis Lu, L. (2019). Ultra-low power SRAM and SRAM based PUF design. Doctoral thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/86213 http://hdl.handle.net/10220/50457 10.32657/10356/86213 en 171 p. application/pdf |
| spellingShingle | Engineering::Electrical and electronic engineering Lu, Lu Ultra-low power SRAM and SRAM based PUF design |
| title | Ultra-low power SRAM and SRAM based PUF design |
| title_full | Ultra-low power SRAM and SRAM based PUF design |
| title_fullStr | Ultra-low power SRAM and SRAM based PUF design |
| title_full_unstemmed | Ultra-low power SRAM and SRAM based PUF design |
| title_short | Ultra-low power SRAM and SRAM based PUF design |
| title_sort | ultra low power sram and sram based puf design |
| topic | Engineering::Electrical and electronic engineering |
| url | https://hdl.handle.net/10356/86213 http://hdl.handle.net/10220/50457 |
| work_keys_str_mv | AT lulu ultralowpowersramandsrambasedpufdesign |