Extensive Laser Fault Injection Profiling of 65 nm FPGA
Fault injection attacks have been widely investigated in both academia and industry during the past decade. In this attack approach, the adversary intentionally induces computational faults in the security components of the integrated circuit (IC) for deducing the confidential information processed...
| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2018
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| Online Access: | https://hdl.handle.net/10356/88764 http://hdl.handle.net/10220/44737 |
| _version_ | 1826118240977289216 |
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| author | Breier, Jakub He, Wei Bhasin, Shivam Jap, Dirmanto Chef, Samuel Ong, Hock Guan Gan, Chee Lip |
| author2 | School of Materials Science & Engineering |
| author_facet | School of Materials Science & Engineering Breier, Jakub He, Wei Bhasin, Shivam Jap, Dirmanto Chef, Samuel Ong, Hock Guan Gan, Chee Lip |
| author_sort | Breier, Jakub |
| collection | NTU |
| description | Fault injection attacks have been widely investigated in both academia and industry during the past decade. In this attack approach, the adversary intentionally induces computational faults in the security components of the integrated circuit (IC) for deducing the confidential information processed or stored inside the device. However, the internal architecture of real-world devices is typically unknown to the attacker and the insufficient information about the device internals often cannot satisfy requirements of a practical fault injection attack. In this paper, we target Field Programmable Gate Array (FPGA) that is widely used in hardware security applications. By analyzing the faulty outputs of implemented algorithms, the scale of logic arrays and the sensitive logic cells can be precisely profiled. Using the outcome of this work, practical attacks can be significantly accelerated, without a need of time-consuming chip-scale injection scan. In addition, the observed fault models are compatible with most of the previously proposed fault models for differential or algebraic fault attacks (DFA/AFA). Moreover, a low-cost and highly sensitive logic-level countermeasure for predicting the laser fault injection attempt is described, which can be applied into any digital IC with a minimal overhead. |
| first_indexed | 2024-10-01T04:40:29Z |
| format | Journal Article |
| id | ntu-10356/88764 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T04:40:29Z |
| publishDate | 2018 |
| record_format | dspace |
| spelling | ntu-10356/887642023-07-14T15:52:20Z Extensive Laser Fault Injection Profiling of 65 nm FPGA Breier, Jakub He, Wei Bhasin, Shivam Jap, Dirmanto Chef, Samuel Ong, Hock Guan Gan, Chee Lip School of Materials Science & Engineering Temasek Laboratories Cryptographic Fault Attack Laser Fault Injection Fault injection attacks have been widely investigated in both academia and industry during the past decade. In this attack approach, the adversary intentionally induces computational faults in the security components of the integrated circuit (IC) for deducing the confidential information processed or stored inside the device. However, the internal architecture of real-world devices is typically unknown to the attacker and the insufficient information about the device internals often cannot satisfy requirements of a practical fault injection attack. In this paper, we target Field Programmable Gate Array (FPGA) that is widely used in hardware security applications. By analyzing the faulty outputs of implemented algorithms, the scale of logic arrays and the sensitive logic cells can be precisely profiled. Using the outcome of this work, practical attacks can be significantly accelerated, without a need of time-consuming chip-scale injection scan. In addition, the observed fault models are compatible with most of the previously proposed fault models for differential or algebraic fault attacks (DFA/AFA). Moreover, a low-cost and highly sensitive logic-level countermeasure for predicting the laser fault injection attempt is described, which can be applied into any digital IC with a minimal overhead. Accepted version 2018-05-03T03:22:37Z 2019-12-06T17:10:28Z 2018-05-03T03:22:37Z 2019-12-06T17:10:28Z 2017 2017 Journal Article Breier, J., He, W., Bhasin, S., Jap, D., Chef, S., Ong, H. G., et al. (2017). Extensive Laser Fault Injection Profiling of 65 nm FPGA. Journal of Hardware and Systems Security, 1(3), 237-251. 2509-3428 https://hdl.handle.net/10356/88764 http://hdl.handle.net/10220/44737 10.1007/s41635-017-0016-z 206736 en Journal of Hardware and Systems Security © 2017 Springer International Publishing AG. This is the author created version of a work that has been peer reviewed and accepted for publication by Journal of Hardware and Systems Security, Springer International Publishing AG. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [http://dx.doi.org/10.1007/s41635-017-0016-z]. 14 p. application/pdf |
| spellingShingle | Cryptographic Fault Attack Laser Fault Injection Breier, Jakub He, Wei Bhasin, Shivam Jap, Dirmanto Chef, Samuel Ong, Hock Guan Gan, Chee Lip Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title | Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title_full | Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title_fullStr | Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title_full_unstemmed | Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title_short | Extensive Laser Fault Injection Profiling of 65 nm FPGA |
| title_sort | extensive laser fault injection profiling of 65 nm fpga |
| topic | Cryptographic Fault Attack Laser Fault Injection |
| url | https://hdl.handle.net/10356/88764 http://hdl.handle.net/10220/44737 |
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