A scalable RFCMOS noise model
This paper presents the high-frequency (HF) noise...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2010
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/90851 http://hdl.handle.net/10220/6245 |
| _version_ | 1811676787454771200 |
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| author | Yeo, Kiat Seng Tong, Ah Fatt Lim, Wei Meng Sia, Choon Beng Zhou, Wen Cong |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Yeo, Kiat Seng Tong, Ah Fatt Lim, Wei Meng Sia, Choon Beng Zhou, Wen Cong |
| author_sort | Yeo, Kiat Seng |
| collection | NTU |
| description | This paper presents the high-frequency (HF) noise
modeling of an RF MOSFET for a 90-nm technology node. A
brief discussion on the noise measurement theory is presented to
illustrate the limitation of the noise measurement system. The extracted
noise sources were studied for their geometry and biasing
dependences and by implementing additional noise sources into
the small-signal RFCMOS model, accurate HF noise simulation
for the transistor can be achieved. Verilog-A is used for the coding
of the additional noise sources into the RFCMOS model and the
added noise source will compensate the underestimation of the
channel thermal noise from the BSIM3v3 core model. Simulated
noise circles and the measured noise figures are plotted at other
source impedances to show that all the noise parameters are
simulated accurately. The biasing and geometry dependences of
the measured and simulated noise parameters are presented to
demonstrate the scalability of the developed HF noise model. The
scalability feature in HF noise model can be implemented into
the process design kit (PDK) so that more powerful PDK can be
developed for the circuit designers to optimize and simulate their
circuit design that requires stringent noise specifications. The
accurate noise simulation can ensure better chance of success and
reduce the number of tape-out and design cycle time. |
| first_indexed | 2024-10-01T02:27:01Z |
| format | Journal Article |
| id | ntu-10356/90851 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T02:27:01Z |
| publishDate | 2010 |
| record_format | dspace |
| spelling | ntu-10356/908512020-03-07T14:02:40Z A scalable RFCMOS noise model Yeo, Kiat Seng Tong, Ah Fatt Lim, Wei Meng Sia, Choon Beng Zhou, Wen Cong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering This paper presents the high-frequency (HF) noise modeling of an RF MOSFET for a 90-nm technology node. A brief discussion on the noise measurement theory is presented to illustrate the limitation of the noise measurement system. The extracted noise sources were studied for their geometry and biasing dependences and by implementing additional noise sources into the small-signal RFCMOS model, accurate HF noise simulation for the transistor can be achieved. Verilog-A is used for the coding of the additional noise sources into the RFCMOS model and the added noise source will compensate the underestimation of the channel thermal noise from the BSIM3v3 core model. Simulated noise circles and the measured noise figures are plotted at other source impedances to show that all the noise parameters are simulated accurately. The biasing and geometry dependences of the measured and simulated noise parameters are presented to demonstrate the scalability of the developed HF noise model. The scalability feature in HF noise model can be implemented into the process design kit (PDK) so that more powerful PDK can be developed for the circuit designers to optimize and simulate their circuit design that requires stringent noise specifications. The accurate noise simulation can ensure better chance of success and reduce the number of tape-out and design cycle time. Published version 2010-05-04T00:50:43Z 2019-12-06T17:55:12Z 2010-05-04T00:50:43Z 2019-12-06T17:55:12Z 2009 2009 Journal Article Tong, A. F., Lim, W. M., Yeo, K. S., Sia, C. B., & Zhou, W. C. (2009). Scalable RFCMOS Noise Model. IEEE Transactions On Microwave Theory And Techniques. 57(5), 1009-1019. 0018-9480 https://hdl.handle.net/10356/90851 http://hdl.handle.net/10220/6245 10.1109/TMTT.2009.2017245 en IEEE transactions on microwave theory and techniques © 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. 11 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Yeo, Kiat Seng Tong, Ah Fatt Lim, Wei Meng Sia, Choon Beng Zhou, Wen Cong A scalable RFCMOS noise model |
| title | A scalable RFCMOS noise model |
| title_full | A scalable RFCMOS noise model |
| title_fullStr | A scalable RFCMOS noise model |
| title_full_unstemmed | A scalable RFCMOS noise model |
| title_short | A scalable RFCMOS noise model |
| title_sort | scalable rfcmos noise model |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | https://hdl.handle.net/10356/90851 http://hdl.handle.net/10220/6245 |
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