Design and optimization of the extended true single-phase clock-based prescaler
The power consumption and operating frequency of the extended true single-phase clock (E-TSPC)-based frequency divider is investigated. The short-circuit power and the switching power in the E-TSPC-based divider are calculated and simulated. A low-power divide-by-2/3 unit of a prescaler is proposed...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2009
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/91419 http://hdl.handle.net/10220/5950 |