Concurrent error detection in bit-serial normal basis multiplication over GF(2^m) using multiple parity prediction schemes

New bit-serial architectures with concurrent error detection capability are presented to detect erroneous outputs in bit-serial normal basis multipliers over GF(2^m) using single and multiple-parity prediction schemes. It is shown that different types of normal basis multipliers could be realized by...

全面介绍

书目详细资料
Main Authors: Lee, Chiou Yng, Meher, Pramod Kumar, Patra, Jagdish Chandra
其他作者: School of Computer Engineering
格式: Journal Article
语言:English
出版: 2011
主题:
在线阅读:https://hdl.handle.net/10356/94346
http://hdl.handle.net/10220/7120
实物特征
总结:New bit-serial architectures with concurrent error detection capability are presented to detect erroneous outputs in bit-serial normal basis multipliers over GF(2^m) using single and multiple-parity prediction schemes. It is shown that different types of normal basis multipliers could be realized by similar architectures. The proposed architectures can detect errors with nearly 100% probability.