Off-chip decoupling capacitor allocation for chip package co-design
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large numbers of legal decap positions. In this paper, we propose a fast decoupling capacitor allocation method. By applying a spe...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2012
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| Online Access: | https://hdl.handle.net/10356/94371 http://hdl.handle.net/10220/7904 |
| _version_ | 1811677558502064128 |
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| author | Yu, Hao Chu, Chunta Lei He |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Yu, Hao Chu, Chunta Lei He |
| author_sort | Yu, Hao |
| collection | NTU |
| description | Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large numbers of legal decap positions. In this paper, we propose a fast decoupling capacitor allocation method. By applying a spectral clustering, a small amount of principal I/Os can be found. Accordingly, the large power supply network is partitioned into several blocks each with only one principal I/O. This enables a localized macromodeling for each block by a triangular-structured reduction. In addition, to systemically consider a large legal position map in a manageable fashion, the map of legal positions is decomposed into multiple rings, which are further parameterized in each block. The decaps are then allocated according to the sensitivity obtained from the parameterized macro-model for each block. Compared to the PRIMA-based macromodeling, experiments show that our method (TBS2) is 25X faster and has 3.04X smaller error. Moreover, our decap allocation reduces the optimization time by 97X, and reduces decap cost by up to 16% to meet the same power-integrty target. |
| first_indexed | 2024-10-01T02:39:17Z |
| format | Conference Paper |
| id | ntu-10356/94371 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T02:39:17Z |
| publishDate | 2012 |
| record_format | dspace |
| spelling | ntu-10356/943712020-04-22T08:36:12Z Off-chip decoupling capacitor allocation for chip package co-design Yu, Hao Chu, Chunta Lei He School of Electrical and Electronic Engineering Design Automation Conference (44th : 2007 : San Diego, USA) Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large numbers of legal decap positions. In this paper, we propose a fast decoupling capacitor allocation method. By applying a spectral clustering, a small amount of principal I/Os can be found. Accordingly, the large power supply network is partitioned into several blocks each with only one principal I/O. This enables a localized macromodeling for each block by a triangular-structured reduction. In addition, to systemically consider a large legal position map in a manageable fashion, the map of legal positions is decomposed into multiple rings, which are further parameterized in each block. The decaps are then allocated according to the sensitivity obtained from the parameterized macro-model for each block. Compared to the PRIMA-based macromodeling, experiments show that our method (TBS2) is 25X faster and has 3.04X smaller error. Moreover, our decap allocation reduces the optimization time by 97X, and reduces decap cost by up to 16% to meet the same power-integrty target. Accepted version 2012-05-11T07:55:11Z 2019-12-06T18:55:04Z 2012-05-11T07:55:11Z 2019-12-06T18:55:04Z 2007 2007 Conference Paper Yu, H., & Chu, C. L. H. (2007). Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design. Proceedings of the 44th annual Design Automation Conference DAC '07 https://hdl.handle.net/10356/94371 http://hdl.handle.net/10220/7904 10.1145/1278480.1278635 en Design automation conference (DAC) © ACM, 2007. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in Proceeding DAC '07, Proceedings of the 44th annual Design Automation Conference, http://doi.acm.org/10.1145/1278480.1278635 5 p. application/pdf |
| spellingShingle | Yu, Hao Chu, Chunta Lei He Off-chip decoupling capacitor allocation for chip package co-design |
| title | Off-chip decoupling capacitor allocation for chip package co-design |
| title_full | Off-chip decoupling capacitor allocation for chip package co-design |
| title_fullStr | Off-chip decoupling capacitor allocation for chip package co-design |
| title_full_unstemmed | Off-chip decoupling capacitor allocation for chip package co-design |
| title_short | Off-chip decoupling capacitor allocation for chip package co-design |
| title_sort | off chip decoupling capacitor allocation for chip package co design |
| url | https://hdl.handle.net/10356/94371 http://hdl.handle.net/10220/7904 |
| work_keys_str_mv | AT yuhao offchipdecouplingcapacitorallocationforchippackagecodesign AT chuchuntaleihe offchipdecouplingcapacitorallocationforchippackagecodesign |