Perspective of flash memory realized on vertical Si nanowires
In this review article, the scaling challenges of planar non-volatile memory, especially the flash-types including both floating gate-based and charge-trap-based devices are firstly discussed. The promising prospects brought by 3-Dimensional (3-D) nano-wire-based cells have been presented along with...
Main Authors: | Yu, Hongyu, Sun, Yuan, Singh, Navab, Lo, Guo-Qing, Kwong, Dim Lee |
---|---|
Other Authors: | School of Electrical and Electronic Engineering |
Format: | Journal Article |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/96165 http://hdl.handle.net/10220/11120 |
Similar Items
-
Vertical-SI-nanowire based nonvolatile flash memory for 3-D ultrahigh density application
by: Sun, Yuan
Published: (2012) -
Vertical silicon nanowire platform for low power electronics and clean energy applications
by: Kwong, Dim Lee, et al.
Published: (2013) -
Piezoresistive sensing performance of junctionless nanowire FET
by: Singh, Pushpapraj, et al.
Published: (2013) -
Effect of nickel silicide induced dopant segregation on vertical silicon nanowire diode performance
by: Tan, Chuan Seng, et al.
Published: (2014) -
Charge-based compact model of gate-all-around floating gate nanowire with variable oxide thickness for flash memory cell
by: Hamzah, Muhammad Afiq Nurudin
Published: (2018)