Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage

A novel strategy based on defect engineering is proposed for high-performance multilevel data storage in oxide-based resistive random access memory (RRAM). Key innovations are (i) material-oriented cell engineering for desired modification of physical locations of generated oxygen vacancies in resis...

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Main Authors: Gao, Bin, Yu, Hongyu, Kang, J. F., Chen, B., Liu, L. F., Liu, X. Y., Wang, Z. R., Yu, B.
Other Authors: School of Electrical and Electronic Engineering
Format: Conference Paper
Language:English
Published: 2013
Subjects:
Online Access:https://hdl.handle.net/10356/97328
http://hdl.handle.net/10220/11838
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author Gao, Bin
Yu, Hongyu
Kang, J. F.
Chen, B.
Liu, L. F.
Liu, X. Y.
Wang, Z. R.
Yu, B.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Gao, Bin
Yu, Hongyu
Kang, J. F.
Chen, B.
Liu, L. F.
Liu, X. Y.
Wang, Z. R.
Yu, B.
author_sort Gao, Bin
collection NTU
description A novel strategy based on defect engineering is proposed for high-performance multilevel data storage in oxide-based resistive random access memory (RRAM). Key innovations are (i) material-oriented cell engineering for desired modification of physical locations of generated oxygen vacancies in resistive switching layer and (ii) innovative operation scheme to control the distribution of oxygen vacancy conducting filaments during the switching. Excellent memory performance with four-level data storage is successfully demonstrated in hafnium-oxide-based RRAM devices, indicating the viability of the proposed engineering design strategy.
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spelling ntu-10356/973282020-03-07T13:24:47Z Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage Gao, Bin Yu, Hongyu Kang, J. F. Chen, B. Liu, L. F. Liu, X. Y. Wang, Z. R. Yu, B. School of Electrical and Electronic Engineering IEEE International Memory Workshop (4th : 2012 : Milan, Italy) DRNTU::Engineering::Electrical and electronic engineering A novel strategy based on defect engineering is proposed for high-performance multilevel data storage in oxide-based resistive random access memory (RRAM). Key innovations are (i) material-oriented cell engineering for desired modification of physical locations of generated oxygen vacancies in resistive switching layer and (ii) innovative operation scheme to control the distribution of oxygen vacancy conducting filaments during the switching. Excellent memory performance with four-level data storage is successfully demonstrated in hafnium-oxide-based RRAM devices, indicating the viability of the proposed engineering design strategy. 2013-07-18T03:09:10Z 2019-12-06T19:41:31Z 2013-07-18T03:09:10Z 2019-12-06T19:41:31Z 2012 2012 Conference Paper Kang, J. F., Gao, B., Chen, B., Liu, L. F., Liu, X. Y., Yu, H., et al. (2012). Oxide-Based RRAM: A Novel Defect-Engineering-Based Implementation for Multilevel Data Storage. 2012 4th IEEE International Memory Workshop. https://hdl.handle.net/10356/97328 http://hdl.handle.net/10220/11838 10.1109/IMW.2012.6213664 en © 2012 IEEE.
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Gao, Bin
Yu, Hongyu
Kang, J. F.
Chen, B.
Liu, L. F.
Liu, X. Y.
Wang, Z. R.
Yu, B.
Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title_full Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title_fullStr Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title_full_unstemmed Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title_short Oxide-based RRAM : a novel defect-engineering-based implementation for multilevel data storage
title_sort oxide based rram a novel defect engineering based implementation for multilevel data storage
topic DRNTU::Engineering::Electrical and electronic engineering
url https://hdl.handle.net/10356/97328
http://hdl.handle.net/10220/11838
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