Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack
We present a systematic investigation of the temperature dependent relaxation current behavior for single layer and dual layer Pt metal nanocrystal (MNC)-based Al2O3/SiO2 flash memory gate stacks. Stacks containing single layer Pt MNC exhibit a dual-slope behavior in the log-log plots of the relaxat...
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Aineistotyyppi: | Journal Article |
Kieli: | English |
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2013
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Linkit: | https://hdl.handle.net/10356/98132 http://hdl.handle.net/10220/10897 |
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author | Pey, Kin Leong Mahapatra, S. Chen, Y. N. Goh, K. E. J. Wu, X. Lwin, Z. Z. Singh, P. K. |
author2 | School of Electrical and Electronic Engineering |
author_facet | School of Electrical and Electronic Engineering Pey, Kin Leong Mahapatra, S. Chen, Y. N. Goh, K. E. J. Wu, X. Lwin, Z. Z. Singh, P. K. |
author_sort | Pey, Kin Leong |
collection | NTU |
description | We present a systematic investigation of the temperature dependent relaxation current behavior for single layer and dual layer Pt metal nanocrystal (MNC)-based Al2O3/SiO2 flash memory gate stacks. Stacks containing single layer Pt MNC exhibit a dual-slope behavior in the log-log plots of the relaxation transient, whereas those with dual layer Pt MNC exhibit a single-slope behavior. We propose a physical model embodying two competing relaxation mechanisms to explain the Pt MNC induced relaxation current—thermionic emission and the quantum tunneling. Based on this model, the dual-slope behavior of single layer MNC-based gate stack can be ascribed to the dominance of thermionic emission at the initial part and quantum tunneling at the tail part. In contrast, the single slope behavior of the dual layer metal nanocrystal-based stack arises from the dominance of the quantum tunneling throughout the relaxation. In addition, we verify that stacks containing dual layer MNC show better retention property than their single layer counterparts. Our results demonstrate that relaxation current measurements offer a simple way to assess the charge retention capability for MNC-based gate stacks. |
first_indexed | 2024-10-01T03:43:06Z |
format | Journal Article |
id | ntu-10356/98132 |
institution | Nanyang Technological University |
language | English |
last_indexed | 2024-10-01T03:43:06Z |
publishDate | 2013 |
record_format | dspace |
spelling | ntu-10356/981322020-03-07T14:00:28Z Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack Pey, Kin Leong Mahapatra, S. Chen, Y. N. Goh, K. E. J. Wu, X. Lwin, Z. Z. Singh, P. K. School of Electrical and Electronic Engineering Microelectronics Centre DRNTU::Engineering::Electrical and electronic engineering We present a systematic investigation of the temperature dependent relaxation current behavior for single layer and dual layer Pt metal nanocrystal (MNC)-based Al2O3/SiO2 flash memory gate stacks. Stacks containing single layer Pt MNC exhibit a dual-slope behavior in the log-log plots of the relaxation transient, whereas those with dual layer Pt MNC exhibit a single-slope behavior. We propose a physical model embodying two competing relaxation mechanisms to explain the Pt MNC induced relaxation current—thermionic emission and the quantum tunneling. Based on this model, the dual-slope behavior of single layer MNC-based gate stack can be ascribed to the dominance of thermionic emission at the initial part and quantum tunneling at the tail part. In contrast, the single slope behavior of the dual layer metal nanocrystal-based stack arises from the dominance of the quantum tunneling throughout the relaxation. In addition, we verify that stacks containing dual layer MNC show better retention property than their single layer counterparts. Our results demonstrate that relaxation current measurements offer a simple way to assess the charge retention capability for MNC-based gate stacks. Published version 2013-07-03T02:40:03Z 2019-12-06T19:51:05Z 2013-07-03T02:40:03Z 2019-12-06T19:51:05Z 2012 2012 Journal Article Chen, Y. N., Goh, K. E. J., Wu, X., Lwin, Z. Z., Singh, P. K., Mahapatra, S., et al. (2012). Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack. Journal of Applied Physics, 112(10), 104503-. 0021-8979 https://hdl.handle.net/10356/98132 http://hdl.handle.net/10220/10897 10.1063/1.4764873 en Journal of applies physics © 2012 American Institute of Physics. This paper was published in Journal of Applies Physics and is made available as an electronic reprint (preprint) with permission of American Institute of Physics. The paper can be found at the following official DOI: [http://dx.doi.org/10.1063/1.4764873]. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law. application/pdf |
spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Pey, Kin Leong Mahapatra, S. Chen, Y. N. Goh, K. E. J. Wu, X. Lwin, Z. Z. Singh, P. K. Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title | Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title_full | Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title_fullStr | Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title_full_unstemmed | Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title_short | Temperature-dependent relaxation current on single and dual layer Pt metal nanocrystal-based Al2O3/SiO2 gate stack |
title_sort | temperature dependent relaxation current on single and dual layer pt metal nanocrystal based al2o3 sio2 gate stack |
topic | DRNTU::Engineering::Electrical and electronic engineering |
url | https://hdl.handle.net/10356/98132 http://hdl.handle.net/10220/10897 |
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