Fast simulation of hybrid CMOS and STT-MTJ circuits with identified internal state variables
Hybrid integration of CMOS and non-volatile memory (NVM) devices has become the technology foundation for emerging non-volatile memory based computing. The primary challenge to validate a hybrid system with both CMOS and non-volatile devices is to develop a SPICE-like simulator that can simulate the...
| Principais autores: | , , |
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| Outros Autores: | |
| Formato: | Conference Paper |
| Idioma: | English |
| Publicado em: |
2013
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| Assuntos: | |
| Acesso em linha: | https://hdl.handle.net/10356/98706 http://hdl.handle.net/10220/12534 |