A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology
A 100 GHz transformer-based VCO is implemented in a 65nm CMOS technology. The large and linear magnetic tuning is realized by using a triple-coupled transformer. The tuning range of the proposed VCO is from 95.37 GHz to 106.68 GHz, which is currently the widest at the frequency around and above 100...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2013
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| Online Access: | https://hdl.handle.net/10356/99932 http://hdl.handle.net/10220/16226 |
| _version_ | 1811688884633862144 |
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| author | Yi, Xiang Boon, Chirn Chye Lin, Jia Fu Lim, Wei Meng |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Yi, Xiang Boon, Chirn Chye Lin, Jia Fu Lim, Wei Meng |
| author_sort | Yi, Xiang |
| collection | NTU |
| description | A 100 GHz transformer-based VCO is implemented in a 65nm CMOS technology. The large and linear magnetic tuning is realized by using a triple-coupled transformer. The tuning range of the proposed VCO is from 95.37 GHz to 106.68 GHz, which is currently the widest at the frequency around and above 100 GHz in CMOS technology. The measured phase noise is -104.5 dBc/Hz @ 10 MHz offset from a carrier frequency of 100.03 GHz. The power consumption is from 3.52 to 11.9 mW across the tuning range, with a 0.8 V supply voltage. The figure-of-merit FOM is -175.5 dBc/Hz and FOMT is -176.5 dBc/Hz respectively. |
| first_indexed | 2024-10-01T05:39:18Z |
| format | Conference Paper |
| id | ntu-10356/99932 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T05:39:18Z |
| publishDate | 2013 |
| record_format | dspace |
| spelling | ntu-10356/999322020-03-07T13:24:49Z A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology Yi, Xiang Boon, Chirn Chye Lin, Jia Fu Lim, Wei Meng School of Electrical and Electronic Engineering European Solid State Circuits Conference (2012 : 38th) DRNTU::Engineering::Electrical and electronic engineering A 100 GHz transformer-based VCO is implemented in a 65nm CMOS technology. The large and linear magnetic tuning is realized by using a triple-coupled transformer. The tuning range of the proposed VCO is from 95.37 GHz to 106.68 GHz, which is currently the widest at the frequency around and above 100 GHz in CMOS technology. The measured phase noise is -104.5 dBc/Hz @ 10 MHz offset from a carrier frequency of 100.03 GHz. The power consumption is from 3.52 to 11.9 mW across the tuning range, with a 0.8 V supply voltage. The figure-of-merit FOM is -175.5 dBc/Hz and FOMT is -176.5 dBc/Hz respectively. 2013-10-03T02:36:03Z 2019-12-06T20:13:46Z 2013-10-03T02:36:03Z 2019-12-06T20:13:46Z 2012 2012 Conference Paper Yi, X., Boon, C. C., Lin, J. F., & Lim, W. M. (2012). A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology. ESSCIRC 2012 - 38th European Solid State Circuits Conference, pp.293-296. https://hdl.handle.net/10356/99932 http://hdl.handle.net/10220/16226 10.1109/ESSCIRC.2012.6341312 en |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Yi, Xiang Boon, Chirn Chye Lin, Jia Fu Lim, Wei Meng A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title | A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title_full | A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title_fullStr | A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title_full_unstemmed | A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title_short | A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology |
| title_sort | 100 ghz transformer based varactor less vco with 11 2 tuning range in 65nm cmos technology |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | https://hdl.handle.net/10356/99932 http://hdl.handle.net/10220/16226 |
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