| Summary: | Currently there are many papers that discuss about wavelet transform
either about the usefulness as well as about the implementation process of the
wavelet transform both in software and hardware. One of the hardware media
used for the implementation of the wavelet transform is Field Programmable Gate
Array (FPGA). The study that focuses on FPGA can�t be separated from the
optimization to improve resources efficiency because the resources which
available in the FPGA is limited. In the FPGA implementation of DWT, the
resources efficiency will be influenced by algorithm, fiter bank structure, data
format, and program structure.
This paper implements an efficient and accurate of discrete Haar wavelet
transform by selecting the best fit filter bank structure and data format. There are
three filter bank structures and three data format that studied. The filter bank
structure includes polyphase, lattice1 and lattice2 structure while for the type of
data format consists of floating point and two types fixed point data format. In this
paper also investigated the effect of the decomposition level to the using of FPGA
resources. The study was conducted on FPGA Xilinx Spartan 3 - E (XC3S500E-
4FG320) and written using Verilog HDL. Implementation of wavelet transform is
intended for processing of voice signal and limited to 1 - D.
FPGA implementation of the discrete Haar wavelet transform on FPGA
show that the lattice2 filter bank structure and fixed point data format is able to
give an efficient and accurate implementation of wavelet transform.
Implementation of discrete Haar wavelet transform filter banks with lattice2
structure, fixed point data formats and with 6th decomposition level requires only
5% slice and can give 98.9% accuracy.
Keywords : Discrete Haar Wavelet Transform, FPGA, Verilog, Filter Bank, Data
Format
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