Design of 0.13um CMOS multi-valued analog to digital converter
A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the convention...
| Main Authors: | , , , |
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| Format: | Proceeding Paper |
| Language: | English |
| Published: |
2012
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/26288/1/06271248.pdf |
| _version_ | 1825646858969546752 |
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| author | Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur |
| author_facet | Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur |
| author_sort | Farhana, Soheli |
| collection | IIUM |
| description | A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design implements current mode ADC architecture and is simulated using the model parameters for a standard 0.13μm CMOS process. The performance analysis of the design shows desirable performance parameters in terms of response, low power consumption, and a sampling rate of 500kHz at a supply voltage of 1.3V was achieved. The ADC design is suitable for digital wireless communication applications such as ultra wideband (UWB) and the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design. |
| first_indexed | 2024-03-05T23:08:53Z |
| format | Proceeding Paper |
| id | oai:generic.eprints.org:26288 |
| institution | International Islamic University Malaysia |
| language | English |
| last_indexed | 2024-03-05T23:08:53Z |
| publishDate | 2012 |
| record_format | dspace |
| spelling | oai:generic.eprints.org:262882017-06-14T02:18:32Z http://irep.iium.edu.my/26288/ Design of 0.13um CMOS multi-valued analog to digital converter Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur TK Electrical engineering. Electronics Nuclear engineering A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design implements current mode ADC architecture and is simulated using the model parameters for a standard 0.13μm CMOS process. The performance analysis of the design shows desirable performance parameters in terms of response, low power consumption, and a sampling rate of 500kHz at a supply voltage of 1.3V was achieved. The ADC design is suitable for digital wireless communication applications such as ultra wideband (UWB) and the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design. 2012 Proceeding Paper PeerReviewed application/pdf en http://irep.iium.edu.my/26288/1/06271248.pdf Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz and Rahman, Md. Ataur (2012) Design of 0.13um CMOS multi-valued analog to digital converter. In: International Conference on Computer and Communication Engineering (ICCCE 2012), 3-5 July 2012, Seri Pacific Hotel Kuala Lumpur. http://dx.doi.org/10.1109/ICCCE.2012.6271248 doi:10.1109/ICCCE.2012.6271248 |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur Design of 0.13um CMOS multi-valued analog to digital converter |
| title | Design of 0.13um CMOS multi-valued analog to digital converter |
| title_full | Design of 0.13um CMOS multi-valued analog to digital converter |
| title_fullStr | Design of 0.13um CMOS multi-valued analog to digital converter |
| title_full_unstemmed | Design of 0.13um CMOS multi-valued analog to digital converter |
| title_short | Design of 0.13um CMOS multi-valued analog to digital converter |
| title_sort | design of 0 13um cmos multi valued analog to digital converter |
| topic | TK Electrical engineering. Electronics Nuclear engineering |
| url | http://irep.iium.edu.my/26288/1/06271248.pdf |
| work_keys_str_mv | AT farhanasoheli designof013umcmosmultivaluedanalogtodigitalconverter AT alamahmzahirul designof013umcmosmultivaluedanalogtodigitalconverter AT khansheroz designof013umcmosmultivaluedanalogtodigitalconverter AT rahmanmdataur designof013umcmosmultivaluedanalogtodigitalconverter |