IMPLEMENTASI INVERSE FAST FOURIER TRANSFORM (IFFT) 8 TITIK PADA FIELD PROGRAMMABLE GATE ARRAY (FPGA) - Perpustakaan UGM, i-lib ([Yogyakarta] : Universitas Gadjah Mada, 2010)
Inverse Fast Fourier Transform (IFFT) allows you to speed up the computation of Inverse Discrete Fourier Transform (IDFT), which has a lot of arithmetic operations. In this study, IFFT Algorithm Radix-2 Decimation in Time (DIT) is used as the overall processing operations. For large number of points, it has been seen that the IFFT is very useful and more effective. Multiplication operation in this study is designed using the Booth algorithm. The method used in this research is proving IFFT Algorithm Radix-2 DIT against IFFT MATLAB toolbox, program design VHDL (Very High speed integrated circuit Hardware Description Language) 8 point IFFT using Xilinx ISE software, and implementation in Xilinx Spartan 3E FPGA. Source of data for processing in the FPGA is sent by the microcontroller using FPGA clock as trigger for microcontrol(er interrupt operation. Implementation results show that the output multiplier process itself has an absolute error and average relative error of 0.58 and 0.91%. While on the whole process of the output of MA TLAB toolbox there is an error, although still small enough that can be tolerated Average absolute error and relative error at the output of MATLAB toolbox are 0.09 and 0.1%. Respectively the results of implementation in the FPGA also has a fairly high accuracy. The maximum absolute error produced is one, for absolute error exceed J are outputs that exceed the range of signed 8 bits of data The number of slices used in the implementation of the IFFT eight points in the FPGA is 9% of the total 4656 slice available.