Study the effect of drain induced barrier lowering (DIBL) in CMOS device by using silvaco TCAD / Hashimah Hashim , Shafinaz Sobihana Shariffudin , Puteri Sarah Mohamad &Aad
A study of drain induced barrier lowering (DIBL) in CMOS device is presented. The study is based on the effect of DIBL due to short channel transistor. Three different values of drain voltage are biased in NMOS and PMOS device to see the role of this voltage on DIBL effects. From drain current, Id v...
| Main Authors: | , , |
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| Format: | Research Reports |
| Language: | English |
| Published: |
Institute of Research, Development and Commercialization , Universiti Teknologi MARA
2007
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| Subjects: | |
| Online Access: | https://ir.uitm.edu.my/id/eprint/1413/1/LP_HASHIMAH_HASHIM_07_24.pdf |