Current conveyor equation-defined macromodels for wideband RF circuit design
A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is su...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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IEEE
2017
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| Online Access: | https://repository.londonmet.ac.uk/1324/1/IJMCS_2_2017_4.pdf |
| _version_ | 1825624767006244864 |
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| author | Brinson, Mike Kuznetsov, Vadim |
| author_facet | Brinson, Mike Kuznetsov, Vadim |
| author_sort | Brinson, Mike |
| collection | LMU |
| description | A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural level current conveyor macromodel cells are described and their performance compared. The material presented is intended for analogue device modellers and circuit designers who wish to simulate large signal current domain integrated circuit designs.It also demonstrates how synthesized Verilog-A modules can be derived from equation-defined device and conventional subcircuits to form functional, computationally efficient current conveyor macromodels. To illustrate the application of behavioural current conveyor macromodels the design of a six cell CCII+ instrumentation amplifier is introduced and its performance discussed. |
| first_indexed | 2024-07-09T03:46:49Z |
| format | Article |
| id | oai:repository.londonmet.ac.uk:1324 |
| institution | London Metropolitan University |
| language | English |
| last_indexed | 2024-07-09T03:46:49Z |
| publishDate | 2017 |
| publisher | IEEE |
| record_format | eprints |
| spelling | oai:repository.londonmet.ac.uk:13242020-06-04T09:38:07Z https://repository.londonmet.ac.uk/1324/ Current conveyor equation-defined macromodels for wideband RF circuit design Brinson, Mike Kuznetsov, Vadim 620 Engineering & allied operations A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural level current conveyor macromodel cells are described and their performance compared. The material presented is intended for analogue device modellers and circuit designers who wish to simulate large signal current domain integrated circuit designs.It also demonstrates how synthesized Verilog-A modules can be derived from equation-defined device and conventional subcircuits to form functional, computationally efficient current conveyor macromodels. To illustrate the application of behavioural current conveyor macromodels the design of a six cell CCII+ instrumentation amplifier is introduced and its performance discussed. IEEE 2017-04 Article PeerReviewed text en cc_by_nc_nd https://repository.londonmet.ac.uk/1324/1/IJMCS_2_2017_4.pdf Brinson, Mike and Kuznetsov, Vadim (2017) Current conveyor equation-defined macromodels for wideband RF circuit design. International Journal of Microelectronics and Computer Science. pp. 65-71. ISSN 2080-8755 http://road.issn.org/issn/2353-9607-international-journal-of-microelectronics-and-computer-science-#.WlEMkN9l-Uk 10.1109/MIXDES.2016.7529701 10.1109/MIXDES.2016.7529701 |
| spellingShingle | 620 Engineering & allied operations Brinson, Mike Kuznetsov, Vadim Current conveyor equation-defined macromodels for wideband RF circuit design |
| title | Current conveyor equation-defined macromodels for wideband RF circuit design |
| title_full | Current conveyor equation-defined macromodels for wideband RF circuit design |
| title_fullStr | Current conveyor equation-defined macromodels for wideband RF circuit design |
| title_full_unstemmed | Current conveyor equation-defined macromodels for wideband RF circuit design |
| title_short | Current conveyor equation-defined macromodels for wideband RF circuit design |
| title_sort | current conveyor equation defined macromodels for wideband rf circuit design |
| topic | 620 Engineering & allied operations |
| url | https://repository.londonmet.ac.uk/1324/1/IJMCS_2_2017_4.pdf |
| work_keys_str_mv | AT brinsonmike currentconveyorequationdefinedmacromodelsforwidebandrfcircuitdesign AT kuznetsovvadim currentconveyorequationdefinedmacromodelsforwidebandrfcircuitdesign |