Qucs Equation-Defined Device modelling with a Verilog-A Prototyping Platform
Since it was first added to Qucs in 2007 Equation-Defined Device (EDD) modelling has become an established model building technique. Originally implemented as a convenient interactive method for constructing experimental compact models, today it is widely used for developing non-linear models of est...
| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | https://repository.londonmet.ac.uk/3960/1/T14_Mike_Brinson_MOS-AK_Washington_DC_2015.pdf |
| Summary: | Since it was first added to Qucs in 2007 Equation-Defined Device (EDD) modelling has become an established model building technique. Originally implemented as a convenient interactive method for constructing experimental compact models, today it is widely used for developing non-linear models of established and emerging technology devices.This presentation introduces a new Qucs EDD to Verilog-A compact model synthesis tool. The background, operation and application of this new Qucs feature are introduced in the presentation, together with a number example modelling cases. The synthesis tool has been released under the General Public Licence as open-source software in support of compact modelling research. It forms part of the Qucs Development Team commitment to the MOS-AK Verilog-A standardisation initiative. |
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