Planar transformers for column parallel CCD clock drive
The LCFI Collaboration is developing the sensors, readout electronics and mechanical support structures for the Vertex Detector (VXD) of the International Linear Collider (ILC). High-speed readout is needed to ensure that the occupancy due to the pair production background at the ILC is kept below 1...
| Main Authors: | , , , , , , , , , , , , , , |
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| Format: | Journal article |
| Language: | English |
| Published: |
2009
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| _version_ | 1826262409897050112 |
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| author | Hawes, B Cussans, D Damerell, C Devetak, E Fopma, J Gao, R Goldstein, J Greenshaw, T Hillert, S Kundu, N Nomerotski, A Perry, C Stefanov, K Thomas, S Worm, S |
| author_facet | Hawes, B Cussans, D Damerell, C Devetak, E Fopma, J Gao, R Goldstein, J Greenshaw, T Hillert, S Kundu, N Nomerotski, A Perry, C Stefanov, K Thomas, S Worm, S |
| author_sort | Hawes, B |
| collection | OXFORD |
| description | The LCFI Collaboration is developing the sensors, readout electronics and mechanical support structures for the Vertex Detector (VXD) of the International Linear Collider (ILC). High-speed readout is needed to ensure that the occupancy due to the pair production background at the ILC is kept below 1% level. In order to satisfy this requirement, Column Parallel CCDs (CPCCDs) and Column Parallel Readout chips (CPRs) have been developed. The CPCCD has to operate at a clock frequency of 50 MHz, which represents a difficult technical challenge due to the relatively large sensor capacitance. The design and performance of planar transformers, which can be used to provide the required 20 A clock current, are described. © 2009 Elsevier B.V. All rights reserved. |
| first_indexed | 2024-03-06T19:35:44Z |
| format | Journal article |
| id | oxford-uuid:1efaef54-673a-4ac7-b186-401ee822f2ea |
| institution | University of Oxford |
| language | English |
| last_indexed | 2024-03-06T19:35:44Z |
| publishDate | 2009 |
| record_format | dspace |
| spelling | oxford-uuid:1efaef54-673a-4ac7-b186-401ee822f2ea2022-03-26T11:19:23ZPlanar transformers for column parallel CCD clock driveJournal articlehttp://purl.org/coar/resource_type/c_dcae04bcuuid:1efaef54-673a-4ac7-b186-401ee822f2eaEnglishSymplectic Elements at Oxford2009Hawes, BCussans, DDamerell, CDevetak, EFopma, JGao, RGoldstein, JGreenshaw, THillert, SKundu, NNomerotski, APerry, CStefanov, KThomas, SWorm, SThe LCFI Collaboration is developing the sensors, readout electronics and mechanical support structures for the Vertex Detector (VXD) of the International Linear Collider (ILC). High-speed readout is needed to ensure that the occupancy due to the pair production background at the ILC is kept below 1% level. In order to satisfy this requirement, Column Parallel CCDs (CPCCDs) and Column Parallel Readout chips (CPRs) have been developed. The CPCCD has to operate at a clock frequency of 50 MHz, which represents a difficult technical challenge due to the relatively large sensor capacitance. The design and performance of planar transformers, which can be used to provide the required 20 A clock current, are described. © 2009 Elsevier B.V. All rights reserved. |
| spellingShingle | Hawes, B Cussans, D Damerell, C Devetak, E Fopma, J Gao, R Goldstein, J Greenshaw, T Hillert, S Kundu, N Nomerotski, A Perry, C Stefanov, K Thomas, S Worm, S Planar transformers for column parallel CCD clock drive |
| title | Planar transformers for column parallel CCD clock drive |
| title_full | Planar transformers for column parallel CCD clock drive |
| title_fullStr | Planar transformers for column parallel CCD clock drive |
| title_full_unstemmed | Planar transformers for column parallel CCD clock drive |
| title_short | Planar transformers for column parallel CCD clock drive |
| title_sort | planar transformers for column parallel ccd clock drive |
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