Investigating pin-holes issues in Josephson junction travelling waveparametric amplifiers requiring large area of dielectric layer
Microwave superconducting Josephson Travelling Wave Parametric Amplifiers (JTWPAs) exploit the non-linear inductance of a long superconducting metamaterial line formed by thousands of Josephson junctions to achieve broadband parametric gain with quantum limited added noise. Nevertheless, pin-holes i...
| Main Authors: | , , , , |
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| Format: | Conference item |
| Language: | English |
| Published: |
2024
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| Summary: | Microwave superconducting Josephson Travelling Wave Parametric Amplifiers (JTWPAs) exploit the non-linear inductance of a long superconducting metamaterial line formed by thousands of Josephson junctions to achieve broadband parametric gain with quantum limited added noise. Nevertheless, pin-holes in the dielectric (spacer) layer required for fabricating these superconducting transmission lines (STLs) represent a challenge for JTWPAs fabrication. In this paper, we explore two pin-holes mitigation techniques, which shown promising results with DC characterisation of a suite of test structures at cryogenic temperatures. When implemented for actual JTWPA designs with much longer length, they have shown to improve the fabrication yield albeit some pin-holes still seems to exist over the large wafer area. This indicates that further mitigation effort is required to completely eradicate the pin-holes issue for applications requiring large area of dielectric layer such as microwave JTWPAs. |
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