Design of a readout chip for LHCB - van Bakel, N; van den Brand, J; Verkooijen, H; Baumeister, D; Hofmann, W; Knopfle, K; Lochner, S; Schmelling, M; Sexauer, E; Feuerstack-Raible, M; Schweda, J; Harnew, N; et al. (2000)
This paper details design and simulation of a prototype of a 128 channel readout chip for the LHCb experiment.The chip named Beetle fulfills the requirements of the silicon vertex detector, the inner tracker, the pileup veto trigger and the RICH detector(1) of LHCb.Section 1 summarizes the requirements on a LHCb frontend chip. Section 2 presents an overview of the chip's architecture and features. Section 3 describes the various components and shows simulation results. Section 4 gives an outlook on future plans.